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@ -97,6 +97,158 @@ CodeGenState::~CodeGenState() { |
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} |
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// -------------------------------------------------------------------------
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// Deferred code objects
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//
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// These subclasses of DeferredCode add pieces of code to the end of generated
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// code. They are branched to from the generated code, and
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// keep some slower code out of the main body of the generated code.
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// Many of them call a code stub or a runtime function.
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class DeferredInlineSmiAdd: public DeferredCode { |
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public: |
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DeferredInlineSmiAdd(Register dst, |
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Smi* value, |
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OverwriteMode overwrite_mode) |
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: dst_(dst), value_(value), overwrite_mode_(overwrite_mode) { |
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set_comment("[ DeferredInlineSmiAdd"); |
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} |
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virtual void Generate(); |
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private: |
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Register dst_; |
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Smi* value_; |
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OverwriteMode overwrite_mode_; |
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}; |
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// The result of value + src is in dst. It either overflowed or was not
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// smi tagged. Undo the speculative addition and call the appropriate
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// specialized stub for add. The result is left in dst.
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class DeferredInlineSmiAddReversed: public DeferredCode { |
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public: |
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DeferredInlineSmiAddReversed(Register dst, |
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Smi* value, |
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OverwriteMode overwrite_mode) |
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: dst_(dst), value_(value), overwrite_mode_(overwrite_mode) { |
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set_comment("[ DeferredInlineSmiAddReversed"); |
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} |
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virtual void Generate(); |
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private: |
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Register dst_; |
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Smi* value_; |
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OverwriteMode overwrite_mode_; |
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}; |
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class DeferredInlineSmiSub: public DeferredCode { |
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public: |
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DeferredInlineSmiSub(Register dst, |
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Smi* value, |
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OverwriteMode overwrite_mode) |
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: dst_(dst), value_(value), overwrite_mode_(overwrite_mode) { |
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set_comment("[ DeferredInlineSmiSub"); |
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} |
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virtual void Generate(); |
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private: |
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Register dst_; |
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Smi* value_; |
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OverwriteMode overwrite_mode_; |
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}; |
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// Call the appropriate binary operation stub to compute src op value
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// and leave the result in dst.
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class DeferredInlineSmiOperation: public DeferredCode { |
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public: |
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DeferredInlineSmiOperation(Token::Value op, |
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Register dst, |
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Register src, |
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Smi* value, |
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OverwriteMode overwrite_mode) |
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: op_(op), |
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dst_(dst), |
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src_(src), |
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value_(value), |
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overwrite_mode_(overwrite_mode) { |
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set_comment("[ DeferredInlineSmiOperation"); |
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} |
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virtual void Generate(); |
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private: |
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Token::Value op_; |
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Register dst_; |
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Register src_; |
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Smi* value_; |
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OverwriteMode overwrite_mode_; |
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}; |
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class FloatingPointHelper : public AllStatic { |
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public: |
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// Code pattern for loading a floating point value. Input value must
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// be either a smi or a heap number object (fp value). Requirements:
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// operand on TOS+1. Returns operand as floating point number on FPU
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// stack.
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static void LoadFloatOperand(MacroAssembler* masm, Register scratch); |
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// Code pattern for loading a floating point value. Input value must
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// be either a smi or a heap number object (fp value). Requirements:
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// operand in src register. Returns operand as floating point number
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// in XMM register
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static void LoadFloatOperand(MacroAssembler* masm, |
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Register src, |
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XMMRegister dst); |
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// Code pattern for loading floating point values. Input values must
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// be either smi or heap number objects (fp values). Requirements:
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// operand_1 on TOS+1 , operand_2 on TOS+2; Returns operands as
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// floating point numbers in XMM registers.
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static void LoadFloatOperands(MacroAssembler* masm, |
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XMMRegister dst1, |
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XMMRegister dst2); |
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// Code pattern for loading floating point values onto the fp stack.
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// Input values must be either smi or heap number objects (fp values).
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// Requirements:
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// Register version: operands in registers lhs and rhs.
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// Stack version: operands on TOS+1 and TOS+2.
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// Returns operands as floating point numbers on fp stack.
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static void LoadFloatOperands(MacroAssembler* masm); |
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static void LoadFloatOperands(MacroAssembler* masm, |
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Register lhs, |
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Register rhs); |
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// Code pattern for loading a floating point value and converting it
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// to a 32 bit integer. Input value must be either a smi or a heap number
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// object.
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// Returns operands as 32-bit sign extended integers in a general purpose
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// registers.
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static void LoadInt32Operand(MacroAssembler* masm, |
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const Operand& src, |
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Register dst); |
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// Test if operands are smi or number objects (fp). Requirements:
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// operand_1 in rax, operand_2 in rdx; falls through on float or smi
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// operands, jumps to the non_float label otherwise.
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static void CheckFloatOperands(MacroAssembler* masm, |
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Label* non_float); |
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// Allocate a heap number in new space with undefined value.
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// Returns tagged pointer in result, or jumps to need_gc if new space is full.
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static void AllocateHeapNumber(MacroAssembler* masm, |
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Label* need_gc, |
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Register scratch, |
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Register result); |
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}; |
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// -----------------------------------------------------------------------------
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// CodeGenerator implementation.
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@ -3351,10 +3503,161 @@ void CodeGenerator::GenerateArgumentsLength(ZoneList<Expression*>* args) { |
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} |
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void CodeGenerator::GenerateFastCharCodeAt(ZoneList<Expression*>* a) { |
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// TODO(X64): Implement this function.
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// Ignore arguments and return undefined, to signal failure.
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frame_->Push(Factory::undefined_value()); |
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void CodeGenerator::GenerateFastCharCodeAt(ZoneList<Expression*>* args) { |
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Comment(masm_, "[ GenerateFastCharCodeAt"); |
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ASSERT(args->length() == 2); |
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Label slow_case; |
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Label end; |
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Label not_a_flat_string; |
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Label a_cons_string; |
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Label try_again_with_new_string; |
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Label ascii_string; |
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Label got_char_code; |
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Load(args->at(0)); |
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Load(args->at(1)); |
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Result index = frame_->Pop(); |
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Result object = frame_->Pop(); |
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// Get register rcx to use as shift amount later.
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Result shift_amount; |
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if (object.is_register() && object.reg().is(rcx)) { |
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Result fresh = allocator_->Allocate(); |
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shift_amount = object; |
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object = fresh; |
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__ movq(object.reg(), rcx); |
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} |
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if (index.is_register() && index.reg().is(rcx)) { |
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Result fresh = allocator_->Allocate(); |
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shift_amount = index; |
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index = fresh; |
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__ movq(index.reg(), rcx); |
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} |
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// There could be references to ecx in the frame. Allocating will
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// spill them, otherwise spill explicitly.
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if (shift_amount.is_valid()) { |
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frame_->Spill(rcx); |
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} else { |
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shift_amount = allocator()->Allocate(rcx); |
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} |
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ASSERT(shift_amount.is_register()); |
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ASSERT(shift_amount.reg().is(rcx)); |
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ASSERT(allocator_->count(rcx) == 1); |
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// We will mutate the index register and possibly the object register.
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// The case where they are somehow the same register is handled
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// because we only mutate them in the case where the receiver is a
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// heap object and the index is not.
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object.ToRegister(); |
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index.ToRegister(); |
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frame_->Spill(object.reg()); |
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frame_->Spill(index.reg()); |
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// We need a single extra temporary register.
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Result temp = allocator()->Allocate(); |
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ASSERT(temp.is_valid()); |
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// There is no virtual frame effect from here up to the final result
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// push.
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// If the receiver is a smi trigger the slow case.
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ASSERT(kSmiTag == 0); |
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__ testl(object.reg(), Immediate(kSmiTagMask)); |
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__ j(zero, &slow_case); |
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// If the index is negative or non-smi trigger the slow case.
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ASSERT(kSmiTag == 0); |
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__ testl(index.reg(), |
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Immediate(static_cast<int32_t>(kSmiTagMask | 0x80000000U))); |
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__ j(not_zero, &slow_case); |
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// Untag the index.
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__ sarl(index.reg(), Immediate(kSmiTagSize)); |
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__ bind(&try_again_with_new_string); |
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// Fetch the instance type of the receiver into rcx.
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__ movq(rcx, FieldOperand(object.reg(), HeapObject::kMapOffset)); |
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__ movzxbl(rcx, FieldOperand(rcx, Map::kInstanceTypeOffset)); |
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// If the receiver is not a string trigger the slow case.
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__ testb(rcx, Immediate(kIsNotStringMask)); |
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__ j(not_zero, &slow_case); |
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// Here we make assumptions about the tag values and the shifts needed.
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// See the comment in objects.h.
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ASSERT(kLongStringTag == 0); |
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ASSERT(kMediumStringTag + String::kLongLengthShift == |
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String::kMediumLengthShift); |
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ASSERT(kShortStringTag + String::kLongLengthShift == |
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String::kShortLengthShift); |
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__ and_(rcx, Immediate(kStringSizeMask)); |
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__ addq(rcx, Immediate(String::kLongLengthShift)); |
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// Fetch the length field into the temporary register.
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__ movl(temp.reg(), FieldOperand(object.reg(), String::kLengthOffset)); |
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__ shrl(temp.reg()); // The shift amount in ecx is implicit operand.
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// Check for index out of range.
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__ cmpl(index.reg(), temp.reg()); |
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__ j(greater_equal, &slow_case); |
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// Reload the instance type (into the temp register this time)..
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__ movq(temp.reg(), FieldOperand(object.reg(), HeapObject::kMapOffset)); |
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__ movzxbl(temp.reg(), FieldOperand(temp.reg(), Map::kInstanceTypeOffset)); |
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// We need special handling for non-flat strings.
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ASSERT(kSeqStringTag == 0); |
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__ testb(temp.reg(), Immediate(kStringRepresentationMask)); |
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__ j(not_zero, ¬_a_flat_string); |
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// Check for 1-byte or 2-byte string.
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__ testb(temp.reg(), Immediate(kStringEncodingMask)); |
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__ j(not_zero, &ascii_string); |
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// 2-byte string.
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// Load the 2-byte character code into the temp register.
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__ movzxwl(temp.reg(), FieldOperand(object.reg(), |
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index.reg(), |
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times_2, |
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SeqTwoByteString::kHeaderSize)); |
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__ jmp(&got_char_code); |
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// ASCII string.
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__ bind(&ascii_string); |
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// Load the byte into the temp register.
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__ movzxbl(temp.reg(), FieldOperand(object.reg(), |
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index.reg(), |
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times_1, |
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SeqAsciiString::kHeaderSize)); |
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__ bind(&got_char_code); |
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ASSERT(kSmiTag == 0); |
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__ shl(temp.reg(), Immediate(kSmiTagSize)); |
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__ jmp(&end); |
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// Handle non-flat strings.
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__ bind(¬_a_flat_string); |
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__ and_(temp.reg(), Immediate(kStringRepresentationMask)); |
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__ cmpb(temp.reg(), Immediate(kConsStringTag)); |
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__ j(equal, &a_cons_string); |
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__ cmpb(temp.reg(), Immediate(kSlicedStringTag)); |
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__ j(not_equal, &slow_case); |
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// SlicedString.
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// Add the offset to the index and trigger the slow case on overflow.
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__ addl(index.reg(), FieldOperand(object.reg(), SlicedString::kStartOffset)); |
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__ j(overflow, &slow_case); |
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// Getting the underlying string is done by running the cons string code.
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// ConsString.
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__ bind(&a_cons_string); |
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// Get the first of the two strings. Both sliced and cons strings
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// store their source string at the same offset.
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ASSERT(SlicedString::kBufferOffset == ConsString::kFirstOffset); |
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__ movq(object.reg(), FieldOperand(object.reg(), ConsString::kFirstOffset)); |
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__ jmp(&try_again_with_new_string); |
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__ bind(&slow_case); |
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// Move the undefined value into the result register, which will
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// trigger the slow case.
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__ Move(temp.reg(), Factory::undefined_value()); |
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__ bind(&end); |
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frame_->Push(&temp); |
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} |
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@ -3459,11 +3762,58 @@ void CodeGenerator::GenerateRandomPositiveSmi(ZoneList<Expression*>* args) { |
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void CodeGenerator::GenerateFastMathOp(MathOp op, ZoneList<Expression*>* args) { |
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// TODO(X64): Use inline floating point in the fast case.
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JumpTarget done; |
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JumpTarget call_runtime; |
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ASSERT(args->length() == 1); |
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// Load number.
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// Load number and duplicate it.
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Load(args->at(0)); |
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frame_->Dup(); |
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// Get the number into an unaliased register and load it onto the
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// floating point stack still leaving one copy on the frame.
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Result number = frame_->Pop(); |
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number.ToRegister(); |
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frame_->Spill(number.reg()); |
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FloatingPointHelper::LoadFloatOperand(masm_, number.reg()); |
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number.Unuse(); |
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// Perform the operation on the number.
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switch (op) { |
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case SIN: |
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__ fsin(); |
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break; |
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case COS: |
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__ fcos(); |
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break; |
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} |
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// Go slow case if argument to operation is out of range.
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Result eax_reg = allocator()->Allocate(rax); |
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ASSERT(eax_reg.is_valid()); |
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__ fnstsw_ax(); |
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__ testl(rax, Immediate(0x0400)); // Bit 10 is condition flag C2.
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eax_reg.Unuse(); |
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call_runtime.Branch(not_zero); |
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// Allocate heap number for result if possible.
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Result scratch = allocator()->Allocate(); |
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Result heap_number = allocator()->Allocate(); |
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FloatingPointHelper::AllocateHeapNumber(masm_, |
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call_runtime.entry_label(), |
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scratch.reg(), |
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heap_number.reg()); |
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scratch.Unuse(); |
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// Store the result in the allocated heap number.
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__ fstp_d(FieldOperand(heap_number.reg(), HeapNumber::kValueOffset)); |
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// Replace the extra copy of the argument with the result.
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frame_->SetElementAt(0, &heap_number); |
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done.Jump(); |
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call_runtime.Bind(); |
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// Free ST(0) which was not popped before calling into the runtime.
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__ ffree(0); |
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Result answer; |
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switch (op) { |
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case SIN: |
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@ -3474,6 +3824,7 @@ void CodeGenerator::GenerateFastMathOp(MathOp op, ZoneList<Expression*>* args) { |
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break; |
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} |
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frame_->Push(&answer); |
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done.Bind(); |
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} |
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@ -4080,8 +4431,6 @@ void CodeGenerator::LoadFromSlotCheckForArguments(Slot* slot, |
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void CodeGenerator::StoreToSlot(Slot* slot, InitState init_state) { |
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// TODO(X64): Enable more types of slot.
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if (slot->type() == Slot::LOOKUP) { |
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ASSERT(slot->var()->is_dynamic()); |
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@ -4534,108 +4883,6 @@ void CodeGenerator::Comparison(Condition cc, |
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} |
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// Flag that indicates whether or not the code that handles smi arguments
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// should be placed in the stub, inlined, or omitted entirely.
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enum GenericBinaryFlags { |
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SMI_CODE_IN_STUB, |
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SMI_CODE_INLINED |
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}; |
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class FloatingPointHelper : public AllStatic { |
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public: |
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// Code pattern for loading a floating point value. Input value must
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// be either a smi or a heap number object (fp value). Requirements:
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// operand in src register. Returns operand as floating point number
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// in XMM register
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static void LoadFloatOperand(MacroAssembler* masm, |
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Register src, |
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XMMRegister dst); |
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// Code pattern for loading floating point values. Input values must
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// be either smi or heap number objects (fp values). Requirements:
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// operand_1 on TOS+1 , operand_2 on TOS+2; Returns operands as
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// floating point numbers in XMM registers.
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static void LoadFloatOperands(MacroAssembler* masm, |
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XMMRegister dst1, |
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XMMRegister dst2); |
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// Code pattern for loading floating point values onto the fp stack.
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// Input values must be either smi or heap number objects (fp values).
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// Requirements:
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// Register version: operands in registers lhs and rhs.
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// Stack version: operands on TOS+1 and TOS+2.
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// Returns operands as floating point numbers on fp stack.
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static void LoadFloatOperands(MacroAssembler* masm); |
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static void LoadFloatOperands(MacroAssembler* masm, |
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Register lhs, |
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Register rhs); |
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// Code pattern for loading a floating point value and converting it
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// to a 32 bit integer. Input value must be either a smi or a heap number
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// object.
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// Returns operands as 32-bit sign extended integers in a general purpose
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// registers.
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static void LoadInt32Operand(MacroAssembler* masm, |
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const Operand& src, |
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Register dst); |
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// Test if operands are smi or number objects (fp). Requirements:
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// operand_1 in rax, operand_2 in rdx; falls through on float
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// operands, jumps to the non_float label otherwise.
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static void CheckFloatOperands(MacroAssembler* masm, |
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Label* non_float); |
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// Allocate a heap number in new space with undefined value.
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// Returns tagged pointer in result, or jumps to need_gc if new space is full.
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static void AllocateHeapNumber(MacroAssembler* masm, |
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Label* need_gc, |
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Register scratch, |
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Register result); |
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}; |
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class GenericBinaryOpStub: public CodeStub { |
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public: |
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GenericBinaryOpStub(Token::Value op, |
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OverwriteMode mode, |
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GenericBinaryFlags flags) |
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: op_(op), mode_(mode), flags_(flags) { |
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ASSERT(OpBits::is_valid(Token::NUM_TOKENS)); |
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} |
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void GenerateSmiCode(MacroAssembler* masm, Label* slow); |
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private: |
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Token::Value op_; |
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OverwriteMode mode_; |
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GenericBinaryFlags flags_; |
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const char* GetName(); |
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#ifdef DEBUG |
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void Print() { |
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PrintF("GenericBinaryOpStub (op %s), (mode %d, flags %d)\n", |
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Token::String(op_), |
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static_cast<int>(mode_), |
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static_cast<int>(flags_)); |
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} |
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#endif |
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// Minor key encoding in 16 bits FOOOOOOOOOOOOOMM.
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class ModeBits: public BitField<OverwriteMode, 0, 2> {}; |
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class OpBits: public BitField<Token::Value, 2, 13> {}; |
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class FlagBits: public BitField<GenericBinaryFlags, 15, 1> {}; |
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Major MajorKey() { return GenericBinaryOp; } |
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int MinorKey() { |
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// Encode the parameters in a unique 16 bit value.
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return OpBits::encode(op_) |
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| ModeBits::encode(mode_) |
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| FlagBits::encode(flags_); |
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} |
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void Generate(MacroAssembler* masm); |
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}; |
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class DeferredInlineBinaryOperation: public DeferredCode { |
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public: |
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DeferredInlineBinaryOperation(Token::Value op, |
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@ -4822,29 +5069,6 @@ void DeferredReferenceGetNamedValue::Generate() { |
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} |
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// The result of src + value is in dst. It either overflowed or was not
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// smi tagged. Undo the speculative addition and call the appropriate
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// specialized stub for add. The result is left in dst.
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class DeferredInlineSmiAdd: public DeferredCode { |
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public: |
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DeferredInlineSmiAdd(Register dst, |
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Smi* value, |
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OverwriteMode overwrite_mode) |
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: dst_(dst), value_(value), overwrite_mode_(overwrite_mode) { |
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set_comment("[ DeferredInlineSmiAdd"); |
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} |
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virtual void Generate(); |
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private: |
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Register dst_; |
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Smi* value_; |
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OverwriteMode overwrite_mode_; |
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}; |
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void DeferredInlineSmiAdd::Generate() { |
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__ push(dst_); |
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__ push(Immediate(value_)); |
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@ -4854,29 +5078,8 @@ void DeferredInlineSmiAdd::Generate() { |
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} |
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// The result of value + src is in dst. It either overflowed or was not
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// smi tagged. Undo the speculative addition and call the appropriate
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// specialized stub for add. The result is left in dst.
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class DeferredInlineSmiAddReversed: public DeferredCode { |
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public: |
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DeferredInlineSmiAddReversed(Register dst, |
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Smi* value, |
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OverwriteMode overwrite_mode) |
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: dst_(dst), value_(value), overwrite_mode_(overwrite_mode) { |
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set_comment("[ DeferredInlineSmiAddReversed"); |
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} |
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virtual void Generate(); |
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private: |
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Register dst_; |
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Smi* value_; |
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OverwriteMode overwrite_mode_; |
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}; |
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void DeferredInlineSmiAddReversed::Generate() { |
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__ push(Immediate(value_)); |
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__ push(Immediate(value_)); // Note: sign extended.
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__ push(dst_); |
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GenericBinaryOpStub igostub(Token::ADD, overwrite_mode_, SMI_CODE_INLINED); |
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__ CallStub(&igostub); |
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@ -4884,37 +5087,28 @@ void DeferredInlineSmiAddReversed::Generate() { |
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} |
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// The result of src - value is in dst. It either overflowed or was not
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// smi tagged. Undo the speculative subtraction and call the
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// appropriate specialized stub for subtract. The result is left in
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// dst.
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class DeferredInlineSmiSub: public DeferredCode { |
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public: |
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DeferredInlineSmiSub(Register dst, |
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Smi* value, |
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OverwriteMode overwrite_mode) |
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: dst_(dst), value_(value), overwrite_mode_(overwrite_mode) { |
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set_comment("[ DeferredInlineSmiSub"); |
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} |
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virtual void Generate(); |
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private: |
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Register dst_; |
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Smi* value_; |
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OverwriteMode overwrite_mode_; |
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}; |
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void DeferredInlineSmiSub::Generate() { |
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__ push(dst_); |
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__ push(Immediate(value_)); |
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__ push(Immediate(value_)); // Note: sign extended.
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GenericBinaryOpStub igostub(Token::SUB, overwrite_mode_, SMI_CODE_INLINED); |
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__ CallStub(&igostub); |
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if (!dst_.is(rax)) __ movq(dst_, rax); |
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} |
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void DeferredInlineSmiOperation::Generate() { |
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__ push(src_); |
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__ push(Immediate(value_)); // Note: sign extended.
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// For mod we don't generate all the Smi code inline.
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GenericBinaryOpStub stub( |
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op_, |
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overwrite_mode_, |
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(op_ == Token::MOD) ? SMI_CODE_IN_STUB : SMI_CODE_INLINED); |
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__ CallStub(&stub); |
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if (!dst_.is(rax)) __ movq(dst_, rax); |
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} |
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void CodeGenerator::ConstantSmiBinaryOperation(Token::Value op, |
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Result* operand, |
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Handle<Object> value, |
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@ -4943,6 +5137,7 @@ void CodeGenerator::ConstantSmiBinaryOperation(Token::Value op, |
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// Get the literal value.
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Smi* smi_value = Smi::cast(*value); |
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int int_value = smi_value->value(); |
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switch (op) { |
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case Token::ADD: { |
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@ -4971,7 +5166,162 @@ void CodeGenerator::ConstantSmiBinaryOperation(Token::Value op, |
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frame_->Push(operand); |
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break; |
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} |
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// TODO(X64): Move other implementations from ia32 to here.
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case Token::SUB: { |
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if (reversed) { |
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Result constant_operand(value); |
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LikelySmiBinaryOperation(op, &constant_operand, operand, |
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overwrite_mode); |
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} else { |
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operand->ToRegister(); |
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frame_->Spill(operand->reg()); |
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DeferredCode* deferred = new DeferredInlineSmiSub(operand->reg(), |
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smi_value, |
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overwrite_mode); |
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__ testl(operand->reg(), Immediate(kSmiTagMask)); |
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deferred->Branch(not_zero); |
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// A smi currently fits in a 32-bit Immediate.
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__ subl(operand->reg(), Immediate(smi_value)); |
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Label add_success; |
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__ j(no_overflow, &add_success); |
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__ addl(operand->reg(), Immediate(smi_value)); |
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deferred->Jump(); |
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__ bind(&add_success); |
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deferred->BindExit(); |
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frame_->Push(operand); |
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} |
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break; |
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} |
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case Token::SAR: |
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if (reversed) { |
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Result constant_operand(value); |
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LikelySmiBinaryOperation(op, &constant_operand, operand, |
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overwrite_mode); |
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} else { |
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// Only the least significant 5 bits of the shift value are used.
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// In the slow case, this masking is done inside the runtime call.
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int shift_value = int_value & 0x1f; |
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operand->ToRegister(); |
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frame_->Spill(operand->reg()); |
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DeferredInlineSmiOperation* deferred = |
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new DeferredInlineSmiOperation(op, |
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operand->reg(), |
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operand->reg(), |
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smi_value, |
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overwrite_mode); |
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__ testl(operand->reg(), Immediate(kSmiTagMask)); |
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deferred->Branch(not_zero); |
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if (shift_value > 0) { |
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__ sarl(operand->reg(), Immediate(shift_value)); |
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__ and_(operand->reg(), Immediate(~kSmiTagMask)); |
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} |
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deferred->BindExit(); |
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frame_->Push(operand); |
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} |
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break; |
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case Token::SHR: |
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if (reversed) { |
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Result constant_operand(value); |
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LikelySmiBinaryOperation(op, &constant_operand, operand, |
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overwrite_mode); |
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} else { |
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// Only the least significant 5 bits of the shift value are used.
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// In the slow case, this masking is done inside the runtime call.
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int shift_value = int_value & 0x1f; |
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operand->ToRegister(); |
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Result answer = allocator()->Allocate(); |
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ASSERT(answer.is_valid()); |
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DeferredInlineSmiOperation* deferred = |
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new DeferredInlineSmiOperation(op, |
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answer.reg(), |
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operand->reg(), |
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smi_value, |
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overwrite_mode); |
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__ testl(operand->reg(), Immediate(kSmiTagMask)); |
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deferred->Branch(not_zero); |
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__ movl(answer.reg(), operand->reg()); |
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__ sarl(answer.reg(), Immediate(kSmiTagSize)); |
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__ shrl(answer.reg(), Immediate(shift_value)); |
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// A negative Smi shifted right two is in the positive Smi range.
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if (shift_value < 2) { |
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__ testl(answer.reg(), Immediate(0xc0000000)); |
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deferred->Branch(not_zero); |
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} |
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operand->Unuse(); |
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ASSERT(kSmiTag == 0); |
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ASSERT(kSmiTagSize == 1); |
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__ addl(answer.reg(), answer.reg()); |
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deferred->BindExit(); |
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frame_->Push(&answer); |
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} |
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break; |
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case Token::BIT_OR: |
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case Token::BIT_XOR: |
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case Token::BIT_AND: { |
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operand->ToRegister(); |
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frame_->Spill(operand->reg()); |
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if (reversed) { |
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// Bit operations with a constant smi are commutative.
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// We can swap left and right operands with no problem.
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// Swap left and right overwrite modes. 0->0, 1->2, 2->1.
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overwrite_mode = static_cast<OverwriteMode>((2 * overwrite_mode) % 3); |
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} |
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DeferredCode* deferred = new DeferredInlineSmiOperation(op, |
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operand->reg(), |
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operand->reg(), |
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smi_value, |
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overwrite_mode); |
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__ testl(operand->reg(), Immediate(kSmiTagMask)); |
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deferred->Branch(not_zero); |
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if (op == Token::BIT_AND) { |
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__ and_(operand->reg(), Immediate(smi_value)); |
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} else if (op == Token::BIT_XOR) { |
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if (int_value != 0) { |
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__ xor_(operand->reg(), Immediate(smi_value)); |
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} |
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} else { |
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ASSERT(op == Token::BIT_OR); |
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if (int_value != 0) { |
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__ or_(operand->reg(), Immediate(smi_value)); |
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} |
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} |
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deferred->BindExit(); |
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frame_->Push(operand); |
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break; |
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} |
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// Generate inline code for mod of powers of 2 and negative powers of 2.
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case Token::MOD: |
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if (!reversed && |
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int_value != 0 && |
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(IsPowerOf2(int_value) || IsPowerOf2(-int_value))) { |
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operand->ToRegister(); |
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frame_->Spill(operand->reg()); |
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DeferredCode* deferred = new DeferredInlineSmiOperation(op, |
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operand->reg(), |
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operand->reg(), |
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smi_value, |
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overwrite_mode); |
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// Check for negative or non-Smi left hand side.
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__ testl(operand->reg(), |
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Immediate(static_cast<int32_t>(kSmiTagMask | 0x80000000))); |
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deferred->Branch(not_zero); |
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if (int_value < 0) int_value = -int_value; |
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if (int_value == 1) { |
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__ movl(operand->reg(), Immediate(Smi::FromInt(0))); |
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} else { |
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__ and_(operand->reg(), Immediate((int_value << kSmiTagSize) - 1)); |
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} |
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deferred->BindExit(); |
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frame_->Push(operand); |
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break; // This break only applies if we generated code for MOD.
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} |
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// Fall through if we did not find a power of 2 on the right hand side!
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// The next case must be the default.
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default: { |
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Result constant_operand(value); |
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if (reversed) { |
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@ -5380,9 +5730,20 @@ void Reference::GetValue(TypeofState typeof_state) { |
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Comment cmnt(masm, "[ Inlined named property load"); |
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Result receiver = cgen_->frame()->Pop(); |
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receiver.ToRegister(); |
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Result value = cgen_->allocator()->Allocate(); |
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ASSERT(value.is_valid()); |
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// Cannot use r12 for receiver, because that changes
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// the distance between a call and a fixup location,
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// due to a special encoding of r12 as r/m in a ModR/M byte.
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if (receiver.reg().is(r12)) { |
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// Swap receiver and value.
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__ movq(value.reg(), receiver.reg()); |
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Result temp = receiver; |
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receiver = value; |
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value = temp; |
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cgen_->frame()->Spill(value.reg()); // r12 may have been shared.
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} |
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DeferredReferenceGetNamedValue* deferred = |
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new DeferredReferenceGetNamedValue(value.reg(), |
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receiver.reg(), |
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@ -5746,7 +6107,7 @@ void ToBooleanStub::Generate(MacroAssembler* masm) { |
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__ and_(rcx, Immediate(kStringSizeMask)); |
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__ cmpq(rcx, Immediate(kShortStringTag)); |
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__ j(not_equal, &true_result); // Empty string is always short.
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__ movq(rdx, FieldOperand(rax, String::kLengthOffset)); |
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__ movl(rdx, FieldOperand(rax, String::kLengthOffset)); |
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__ shr(rdx, Immediate(String::kShortLengthShift)); |
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__ j(zero, &false_result); |
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__ jmp(&true_result); |
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@ -6740,6 +7101,24 @@ void FloatingPointHelper::AllocateHeapNumber(MacroAssembler* masm, |
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} |
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void FloatingPointHelper::LoadFloatOperand(MacroAssembler* masm, |
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Register number) { |
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Label load_smi, done; |
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__ testl(number, Immediate(kSmiTagMask)); |
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__ j(zero, &load_smi); |
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__ fld_d(FieldOperand(number, HeapNumber::kValueOffset)); |
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__ jmp(&done); |
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__ bind(&load_smi); |
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__ sarl(number, Immediate(kSmiTagSize)); |
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__ push(number); |
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__ fild_s(Operand(rsp, 0)); |
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__ pop(number); |
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__ bind(&done); |
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} |
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void FloatingPointHelper::LoadFloatOperand(MacroAssembler* masm, |
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Register src, |
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Ryan
16 years ago