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1090 lines
44 KiB
1090 lines
44 KiB
// Copyright 2012 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#ifndef V8_ARM_MACRO_ASSEMBLER_ARM_H_
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#define V8_ARM_MACRO_ASSEMBLER_ARM_H_
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#include "src/arm/assembler-arm.h"
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#include "src/assembler.h"
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#include "src/bailout-reason.h"
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#include "src/globals.h"
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namespace v8 {
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namespace internal {
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// Give alias names to registers for calling conventions.
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constexpr Register kReturnRegister0 = r0;
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constexpr Register kReturnRegister1 = r1;
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constexpr Register kReturnRegister2 = r2;
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constexpr Register kJSFunctionRegister = r1;
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constexpr Register kContextRegister = r7;
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constexpr Register kAllocateSizeRegister = r1;
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constexpr Register kInterpreterAccumulatorRegister = r0;
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constexpr Register kInterpreterBytecodeOffsetRegister = r5;
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constexpr Register kInterpreterBytecodeArrayRegister = r6;
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constexpr Register kInterpreterDispatchTableRegister = r8;
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constexpr Register kJavaScriptCallArgCountRegister = r0;
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constexpr Register kJavaScriptCallNewTargetRegister = r3;
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constexpr Register kRuntimeCallFunctionRegister = r1;
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constexpr Register kRuntimeCallArgCountRegister = r0;
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// ----------------------------------------------------------------------------
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// Static helper functions
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// Generate a MemOperand for loading a field from an object.
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inline MemOperand FieldMemOperand(Register object, int offset) {
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return MemOperand(object, offset - kHeapObjectTag);
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}
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// Give alias names to registers
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constexpr Register cp = r7; // JavaScript context pointer.
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constexpr Register kRootRegister = r10; // Roots array pointer.
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// Flags used for AllocateHeapNumber
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enum TaggingMode {
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// Tag the result.
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TAG_RESULT,
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// Don't tag
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DONT_TAG_RESULT
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};
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enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET };
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enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK };
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enum PointersToHereCheck {
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kPointersToHereMaybeInteresting,
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kPointersToHereAreAlwaysInteresting
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};
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enum LinkRegisterStatus { kLRHasNotBeenSaved, kLRHasBeenSaved };
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Register GetRegisterThatIsNotOneOf(Register reg1,
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Register reg2 = no_reg,
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Register reg3 = no_reg,
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Register reg4 = no_reg,
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Register reg5 = no_reg,
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Register reg6 = no_reg);
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#ifdef DEBUG
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bool AreAliased(Register reg1,
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Register reg2,
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Register reg3 = no_reg,
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Register reg4 = no_reg,
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Register reg5 = no_reg,
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Register reg6 = no_reg,
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Register reg7 = no_reg,
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Register reg8 = no_reg);
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#endif
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enum TargetAddressStorageMode {
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CAN_INLINE_TARGET_ADDRESS,
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NEVER_INLINE_TARGET_ADDRESS
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};
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class TurboAssembler : public Assembler {
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public:
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TurboAssembler(Isolate* isolate, void* buffer, int buffer_size,
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CodeObjectRequired create_code_object);
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void set_has_frame(bool value) { has_frame_ = value; }
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bool has_frame() const { return has_frame_; }
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Isolate* isolate() const { return isolate_; }
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Handle<HeapObject> CodeObject() {
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DCHECK(!code_object_.is_null());
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return code_object_;
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}
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// Activation support.
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void EnterFrame(StackFrame::Type type,
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bool load_constant_pool_pointer_reg = false);
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// Returns the pc offset at which the frame ends.
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int LeaveFrame(StackFrame::Type type);
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// Push a fixed frame, consisting of lr, fp
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void PushCommonFrame(Register marker_reg = no_reg);
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// Generates function and stub prologue code.
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void StubPrologue(StackFrame::Type type);
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void Prologue();
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// Push a standard frame, consisting of lr, fp, context and JS function
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void PushStandardFrame(Register function_reg);
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void InitializeRootRegister();
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void Push(Register src) { push(src); }
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void Push(Handle<HeapObject> handle);
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void Push(Smi* smi);
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// Push two registers. Pushes leftmost register first (to highest address).
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void Push(Register src1, Register src2, Condition cond = al) {
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if (src1.code() > src2.code()) {
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stm(db_w, sp, src1.bit() | src2.bit(), cond);
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} else {
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str(src1, MemOperand(sp, 4, NegPreIndex), cond);
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str(src2, MemOperand(sp, 4, NegPreIndex), cond);
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}
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}
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// Push three registers. Pushes leftmost register first (to highest address).
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void Push(Register src1, Register src2, Register src3, Condition cond = al) {
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if (src1.code() > src2.code()) {
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if (src2.code() > src3.code()) {
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stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
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} else {
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stm(db_w, sp, src1.bit() | src2.bit(), cond);
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str(src3, MemOperand(sp, 4, NegPreIndex), cond);
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}
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} else {
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str(src1, MemOperand(sp, 4, NegPreIndex), cond);
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Push(src2, src3, cond);
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}
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}
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// Push four registers. Pushes leftmost register first (to highest address).
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void Push(Register src1, Register src2, Register src3, Register src4,
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Condition cond = al) {
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if (src1.code() > src2.code()) {
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if (src2.code() > src3.code()) {
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if (src3.code() > src4.code()) {
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stm(db_w, sp, src1.bit() | src2.bit() | src3.bit() | src4.bit(),
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cond);
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} else {
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stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
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str(src4, MemOperand(sp, 4, NegPreIndex), cond);
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}
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} else {
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stm(db_w, sp, src1.bit() | src2.bit(), cond);
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Push(src3, src4, cond);
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}
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} else {
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str(src1, MemOperand(sp, 4, NegPreIndex), cond);
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Push(src2, src3, src4, cond);
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}
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}
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// Push five registers. Pushes leftmost register first (to highest address).
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void Push(Register src1, Register src2, Register src3, Register src4,
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Register src5, Condition cond = al) {
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if (src1.code() > src2.code()) {
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if (src2.code() > src3.code()) {
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if (src3.code() > src4.code()) {
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if (src4.code() > src5.code()) {
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stm(db_w, sp,
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src1.bit() | src2.bit() | src3.bit() | src4.bit() | src5.bit(),
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cond);
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} else {
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stm(db_w, sp, src1.bit() | src2.bit() | src3.bit() | src4.bit(),
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cond);
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str(src5, MemOperand(sp, 4, NegPreIndex), cond);
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}
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} else {
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stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
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Push(src4, src5, cond);
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}
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} else {
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stm(db_w, sp, src1.bit() | src2.bit(), cond);
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Push(src3, src4, src5, cond);
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}
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} else {
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str(src1, MemOperand(sp, 4, NegPreIndex), cond);
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Push(src2, src3, src4, src5, cond);
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}
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}
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void Pop(Register dst) { pop(dst); }
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// Pop two registers. Pops rightmost register first (from lower address).
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void Pop(Register src1, Register src2, Condition cond = al) {
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DCHECK(src1 != src2);
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if (src1.code() > src2.code()) {
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ldm(ia_w, sp, src1.bit() | src2.bit(), cond);
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} else {
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ldr(src2, MemOperand(sp, 4, PostIndex), cond);
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ldr(src1, MemOperand(sp, 4, PostIndex), cond);
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}
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}
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// Pop three registers. Pops rightmost register first (from lower address).
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void Pop(Register src1, Register src2, Register src3, Condition cond = al) {
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DCHECK(!AreAliased(src1, src2, src3));
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if (src1.code() > src2.code()) {
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if (src2.code() > src3.code()) {
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ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
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} else {
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ldr(src3, MemOperand(sp, 4, PostIndex), cond);
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ldm(ia_w, sp, src1.bit() | src2.bit(), cond);
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}
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} else {
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Pop(src2, src3, cond);
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ldr(src1, MemOperand(sp, 4, PostIndex), cond);
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}
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}
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// Pop four registers. Pops rightmost register first (from lower address).
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void Pop(Register src1, Register src2, Register src3, Register src4,
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Condition cond = al) {
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DCHECK(!AreAliased(src1, src2, src3, src4));
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if (src1.code() > src2.code()) {
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if (src2.code() > src3.code()) {
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if (src3.code() > src4.code()) {
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ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit() | src4.bit(),
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cond);
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} else {
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ldr(src4, MemOperand(sp, 4, PostIndex), cond);
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ldm(ia_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
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}
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} else {
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Pop(src3, src4, cond);
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ldm(ia_w, sp, src1.bit() | src2.bit(), cond);
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}
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} else {
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Pop(src2, src3, src4, cond);
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ldr(src1, MemOperand(sp, 4, PostIndex), cond);
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}
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}
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// Before calling a C-function from generated code, align arguments on stack.
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// After aligning the frame, non-register arguments must be stored in
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// sp[0], sp[4], etc., not pushed. The argument count assumes all arguments
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// are word sized. If double arguments are used, this function assumes that
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// all double arguments are stored before core registers; otherwise the
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// correct alignment of the double values is not guaranteed.
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// Some compilers/platforms require the stack to be aligned when calling
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// C++ code.
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// Needs a scratch register to do some arithmetic. This register will be
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// trashed.
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void PrepareCallCFunction(int num_reg_arguments,
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int num_double_registers = 0);
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// Removes current frame and its arguments from the stack preserving
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// the arguments and a return address pushed to the stack for the next call.
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// Both |callee_args_count| and |caller_args_count_reg| do not include
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// receiver. |callee_args_count| is not modified, |caller_args_count_reg|
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// is trashed.
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void PrepareForTailCall(const ParameterCount& callee_args_count,
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Register caller_args_count_reg, Register scratch0,
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Register scratch1);
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// There are two ways of passing double arguments on ARM, depending on
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// whether soft or hard floating point ABI is used. These functions
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// abstract parameter passing for the three different ways we call
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// C functions from generated code.
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void MovToFloatParameter(DwVfpRegister src);
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void MovToFloatParameters(DwVfpRegister src1, DwVfpRegister src2);
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void MovToFloatResult(DwVfpRegister src);
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// Calls a C function and cleans up the space for arguments allocated
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// by PrepareCallCFunction. The called function is not allowed to trigger a
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// garbage collection, since that might move the code and invalidate the
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// return address (unless this is somehow accounted for by the called
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// function).
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void CallCFunction(ExternalReference function, int num_arguments);
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void CallCFunction(Register function, int num_arguments);
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void CallCFunction(ExternalReference function, int num_reg_arguments,
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int num_double_arguments);
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void CallCFunction(Register function, int num_reg_arguments,
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int num_double_arguments);
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void MovFromFloatParameter(DwVfpRegister dst);
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void MovFromFloatResult(DwVfpRegister dst);
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// Calls Abort(msg) if the condition cond is not satisfied.
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// Use --debug_code to enable.
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void Assert(Condition cond, BailoutReason reason);
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// Like Assert(), but always enabled.
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void Check(Condition cond, BailoutReason reason);
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// Print a message to stdout and abort execution.
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void Abort(BailoutReason msg);
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inline bool AllowThisStubCall(CodeStub* stub);
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void LslPair(Register dst_low, Register dst_high, Register src_low,
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Register src_high, Register scratch, Register shift);
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void LslPair(Register dst_low, Register dst_high, Register src_low,
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Register src_high, uint32_t shift);
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void LsrPair(Register dst_low, Register dst_high, Register src_low,
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Register src_high, Register scratch, Register shift);
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void LsrPair(Register dst_low, Register dst_high, Register src_low,
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Register src_high, uint32_t shift);
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void AsrPair(Register dst_low, Register dst_high, Register src_low,
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Register src_high, Register scratch, Register shift);
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void AsrPair(Register dst_low, Register dst_high, Register src_low,
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Register src_high, uint32_t shift);
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// Returns the size of a call in instructions. Note, the value returned is
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// only valid as long as no entries are added to the constant pool between
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// checking the call size and emitting the actual call.
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static int CallSize(Register target, Condition cond = al);
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int CallSize(Address target, RelocInfo::Mode rmode, Condition cond = al);
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int CallSize(Handle<Code> code,
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RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
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Condition cond = al);
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int CallStubSize();
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void CallStubDelayed(CodeStub* stub);
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void CallRuntimeDelayed(Zone* zone, Runtime::FunctionId fid,
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SaveFPRegsMode save_doubles = kDontSaveFPRegs);
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// Jump, Call, and Ret pseudo instructions implementing inter-working.
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void Call(Register target, Condition cond = al);
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void Call(Address target, RelocInfo::Mode rmode, Condition cond = al,
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TargetAddressStorageMode mode = CAN_INLINE_TARGET_ADDRESS,
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bool check_constant_pool = true);
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void Call(Handle<Code> code, RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
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Condition cond = al,
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TargetAddressStorageMode mode = CAN_INLINE_TARGET_ADDRESS,
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bool check_constant_pool = true);
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void Call(Label* target);
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// This should only be used when assembling a deoptimizer call because of
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// the CheckConstPool invocation, which is only needed for deoptimization.
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void CallForDeoptimization(Address target, RelocInfo::Mode rmode) {
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Call(target, rmode);
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CheckConstPool(false, false);
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}
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// Emit code to discard a non-negative number of pointer-sized elements
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// from the stack, clobbering only the sp register.
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void Drop(int count, Condition cond = al);
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void Drop(Register count, Condition cond = al);
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void Ret(Condition cond = al);
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void Ret(int drop, Condition cond = al);
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// Compare single values and move the result to the normal condition flags.
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void VFPCompareAndSetFlags(const SwVfpRegister src1, const SwVfpRegister src2,
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const Condition cond = al);
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void VFPCompareAndSetFlags(const SwVfpRegister src1, const float src2,
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const Condition cond = al);
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// Compare double values and move the result to the normal condition flags.
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void VFPCompareAndSetFlags(const DwVfpRegister src1, const DwVfpRegister src2,
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const Condition cond = al);
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void VFPCompareAndSetFlags(const DwVfpRegister src1, const double src2,
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const Condition cond = al);
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// If the value is a NaN, canonicalize the value else, do nothing.
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void VFPCanonicalizeNaN(const DwVfpRegister dst, const DwVfpRegister src,
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const Condition cond = al);
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void VFPCanonicalizeNaN(const DwVfpRegister value,
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const Condition cond = al) {
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VFPCanonicalizeNaN(value, value, cond);
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}
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void VmovHigh(Register dst, DwVfpRegister src);
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void VmovHigh(DwVfpRegister dst, Register src);
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void VmovLow(Register dst, DwVfpRegister src);
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void VmovLow(DwVfpRegister dst, Register src);
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void CheckPageFlag(Register object, Register scratch, int mask, Condition cc,
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Label* condition_met);
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// Check whether d16-d31 are available on the CPU. The result is given by the
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// Z condition flag: Z==0 if d16-d31 available, Z==1 otherwise.
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void CheckFor32DRegs(Register scratch);
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void SaveRegisters(RegList registers);
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void RestoreRegisters(RegList registers);
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void CallRecordWriteStub(Register object, Register address,
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RememberedSetAction remembered_set_action,
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SaveFPRegsMode fp_mode);
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// Does a runtime check for 16/32 FP registers. Either way, pushes 32 double
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// values to location, saving [d0..(d15|d31)].
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void SaveFPRegs(Register location, Register scratch);
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// Does a runtime check for 16/32 FP registers. Either way, pops 32 double
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// values to location, restoring [d0..(d15|d31)].
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void RestoreFPRegs(Register location, Register scratch);
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// Calculate how much stack space (in bytes) are required to store caller
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// registers excluding those specified in the arguments.
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int RequiredStackSizeForCallerSaved(SaveFPRegsMode fp_mode,
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Register exclusion1 = no_reg,
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Register exclusion2 = no_reg,
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Register exclusion3 = no_reg) const;
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// Push caller saved registers on the stack, and return the number of bytes
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// stack pointer is adjusted.
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int PushCallerSaved(SaveFPRegsMode fp_mode, Register exclusion1 = no_reg,
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Register exclusion2 = no_reg,
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Register exclusion3 = no_reg);
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// Restore caller saved registers from the stack, and return the number of
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// bytes stack pointer is adjusted.
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int PopCallerSaved(SaveFPRegsMode fp_mode, Register exclusion1 = no_reg,
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Register exclusion2 = no_reg,
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Register exclusion3 = no_reg);
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void Jump(Register target, Condition cond = al);
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void Jump(Address target, RelocInfo::Mode rmode, Condition cond = al);
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void Jump(Handle<Code> code, RelocInfo::Mode rmode, Condition cond = al);
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// Perform a floating-point min or max operation with the
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// (IEEE-754-compatible) semantics of ARM64's fmin/fmax. Some cases, typically
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// NaNs or +/-0.0, are expected to be rare and are handled in out-of-line
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// code. The specific behaviour depends on supported instructions.
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//
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// These functions assume (and assert) that left!=right. It is permitted
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// for the result to alias either input register.
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void FloatMax(SwVfpRegister result, SwVfpRegister left, SwVfpRegister right,
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Label* out_of_line);
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void FloatMin(SwVfpRegister result, SwVfpRegister left, SwVfpRegister right,
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Label* out_of_line);
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void FloatMax(DwVfpRegister result, DwVfpRegister left, DwVfpRegister right,
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Label* out_of_line);
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void FloatMin(DwVfpRegister result, DwVfpRegister left, DwVfpRegister right,
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Label* out_of_line);
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// Generate out-of-line cases for the macros above.
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void FloatMaxOutOfLine(SwVfpRegister result, SwVfpRegister left,
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SwVfpRegister right);
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void FloatMinOutOfLine(SwVfpRegister result, SwVfpRegister left,
|
|
SwVfpRegister right);
|
|
void FloatMaxOutOfLine(DwVfpRegister result, DwVfpRegister left,
|
|
DwVfpRegister right);
|
|
void FloatMinOutOfLine(DwVfpRegister result, DwVfpRegister left,
|
|
DwVfpRegister right);
|
|
|
|
void ExtractLane(Register dst, QwNeonRegister src, NeonDataType dt, int lane);
|
|
void ExtractLane(Register dst, DwVfpRegister src, NeonDataType dt, int lane);
|
|
void ExtractLane(SwVfpRegister dst, QwNeonRegister src, int lane);
|
|
void ReplaceLane(QwNeonRegister dst, QwNeonRegister src, Register src_lane,
|
|
NeonDataType dt, int lane);
|
|
void ReplaceLane(QwNeonRegister dst, QwNeonRegister src,
|
|
SwVfpRegister src_lane, int lane);
|
|
|
|
// Register move. May do nothing if the registers are identical.
|
|
void Move(Register dst, Smi* smi);
|
|
void Move(Register dst, Handle<HeapObject> value);
|
|
void Move(Register dst, Register src, Condition cond = al);
|
|
void Move(Register dst, const Operand& src, SBit sbit = LeaveCC,
|
|
Condition cond = al) {
|
|
if (!src.IsRegister() || src.rm() != dst || sbit != LeaveCC) {
|
|
mov(dst, src, sbit, cond);
|
|
}
|
|
}
|
|
void Move(SwVfpRegister dst, SwVfpRegister src, Condition cond = al);
|
|
void Move(DwVfpRegister dst, DwVfpRegister src, Condition cond = al);
|
|
void Move(QwNeonRegister dst, QwNeonRegister src);
|
|
|
|
// Simulate s-register moves for imaginary s32 - s63 registers.
|
|
void VmovExtended(Register dst, int src_code);
|
|
void VmovExtended(int dst_code, Register src);
|
|
// Move between s-registers and imaginary s-registers.
|
|
void VmovExtended(int dst_code, int src_code);
|
|
void VmovExtended(int dst_code, const MemOperand& src);
|
|
void VmovExtended(const MemOperand& dst, int src_code);
|
|
|
|
// Register swap.
|
|
void Swap(DwVfpRegister srcdst0, DwVfpRegister srcdst1);
|
|
void Swap(QwNeonRegister srcdst0, QwNeonRegister srcdst1);
|
|
|
|
// Get the actual activation frame alignment for target environment.
|
|
static int ActivationFrameAlignment();
|
|
|
|
void Bfc(Register dst, Register src, int lsb, int width, Condition cond = al);
|
|
|
|
void SmiUntag(Register reg, SBit s = LeaveCC) {
|
|
mov(reg, Operand::SmiUntag(reg), s);
|
|
}
|
|
void SmiUntag(Register dst, Register src, SBit s = LeaveCC) {
|
|
mov(dst, Operand::SmiUntag(src), s);
|
|
}
|
|
|
|
// Load an object from the root table.
|
|
void LoadRoot(Register destination, Heap::RootListIndex index,
|
|
Condition cond = al);
|
|
|
|
// Jump if the register contains a smi.
|
|
void JumpIfSmi(Register value, Label* smi_label);
|
|
|
|
// Performs a truncating conversion of a floating point number as used by
|
|
// the JS bitwise operations. See ECMA-262 9.5: ToInt32. Goes to 'done' if it
|
|
// succeeds, otherwise falls through if result is saturated. On return
|
|
// 'result' either holds answer, or is clobbered on fall through.
|
|
//
|
|
// Only public for the test code in test-code-stubs-arm.cc.
|
|
void TryInlineTruncateDoubleToI(Register result, DwVfpRegister input,
|
|
Label* done);
|
|
|
|
// Performs a truncating conversion of a floating point number as used by
|
|
// the JS bitwise operations. See ECMA-262 9.5: ToInt32.
|
|
// Exits with 'result' holding the answer.
|
|
void TruncateDoubleToIDelayed(Zone* zone, Register result,
|
|
DwVfpRegister double_input);
|
|
|
|
// EABI variant for double arguments in use.
|
|
bool use_eabi_hardfloat() {
|
|
#ifdef __arm__
|
|
return base::OS::ArmUsingHardFloat();
|
|
#elif USE_EABI_HARDFLOAT
|
|
return true;
|
|
#else
|
|
return false;
|
|
#endif
|
|
}
|
|
|
|
private:
|
|
bool has_frame_ = false;
|
|
Isolate* const isolate_;
|
|
// This handle will be patched with the code object on installation.
|
|
Handle<HeapObject> code_object_;
|
|
|
|
// Compare single values and then load the fpscr flags to a register.
|
|
void VFPCompareAndLoadFlags(const SwVfpRegister src1,
|
|
const SwVfpRegister src2,
|
|
const Register fpscr_flags,
|
|
const Condition cond = al);
|
|
void VFPCompareAndLoadFlags(const SwVfpRegister src1, const float src2,
|
|
const Register fpscr_flags,
|
|
const Condition cond = al);
|
|
|
|
// Compare double values and then load the fpscr flags to a register.
|
|
void VFPCompareAndLoadFlags(const DwVfpRegister src1,
|
|
const DwVfpRegister src2,
|
|
const Register fpscr_flags,
|
|
const Condition cond = al);
|
|
void VFPCompareAndLoadFlags(const DwVfpRegister src1, const double src2,
|
|
const Register fpscr_flags,
|
|
const Condition cond = al);
|
|
|
|
void Jump(intptr_t target, RelocInfo::Mode rmode, Condition cond = al);
|
|
|
|
// Implementation helpers for FloatMin and FloatMax.
|
|
template <typename T>
|
|
void FloatMaxHelper(T result, T left, T right, Label* out_of_line);
|
|
template <typename T>
|
|
void FloatMinHelper(T result, T left, T right, Label* out_of_line);
|
|
template <typename T>
|
|
void FloatMaxOutOfLineHelper(T result, T left, T right);
|
|
template <typename T>
|
|
void FloatMinOutOfLineHelper(T result, T left, T right);
|
|
|
|
int CalculateStackPassedWords(int num_reg_arguments,
|
|
int num_double_arguments);
|
|
|
|
void CallCFunctionHelper(Register function, int num_reg_arguments,
|
|
int num_double_arguments);
|
|
};
|
|
|
|
// MacroAssembler implements a collection of frequently used macros.
|
|
class MacroAssembler : public TurboAssembler {
|
|
public:
|
|
MacroAssembler(Isolate* isolate, void* buffer, int size,
|
|
CodeObjectRequired create_code_object);
|
|
|
|
// Used for patching in calls to the deoptimizer.
|
|
void CallDeoptimizer(Address target);
|
|
static int CallDeoptimizerSize();
|
|
|
|
// Emit code that loads |parameter_index|'th parameter from the stack to
|
|
// the register according to the CallInterfaceDescriptor definition.
|
|
// |sp_to_caller_sp_offset_in_words| specifies the number of words pushed
|
|
// below the caller's sp.
|
|
template <class Descriptor>
|
|
void LoadParameterFromStack(
|
|
Register reg, typename Descriptor::ParameterIndices parameter_index,
|
|
int sp_to_ra_offset_in_words = 0) {
|
|
DCHECK(Descriptor::kPassLastArgsOnStack);
|
|
UNIMPLEMENTED();
|
|
}
|
|
|
|
// Swap two registers. If the scratch register is omitted then a slightly
|
|
// less efficient form using xor instead of mov is emitted.
|
|
void Swap(Register reg1, Register reg2, Register scratch = no_reg,
|
|
Condition cond = al);
|
|
|
|
void Mls(Register dst, Register src1, Register src2, Register srcA,
|
|
Condition cond = al);
|
|
void And(Register dst, Register src1, const Operand& src2,
|
|
Condition cond = al);
|
|
void Ubfx(Register dst, Register src, int lsb, int width,
|
|
Condition cond = al);
|
|
void Sbfx(Register dst, Register src, int lsb, int width,
|
|
Condition cond = al);
|
|
|
|
void Load(Register dst, const MemOperand& src, Representation r);
|
|
void Store(Register src, const MemOperand& dst, Representation r);
|
|
|
|
// ---------------------------------------------------------------------------
|
|
// GC Support
|
|
|
|
enum RememberedSetFinalAction { kReturnAtEnd, kFallThroughAtEnd };
|
|
|
|
// Record in the remembered set the fact that we have a pointer to new space
|
|
// at the address pointed to by the addr register. Only works if addr is not
|
|
// in new space.
|
|
void RememberedSetHelper(Register object, // Used for debug code.
|
|
Register addr, Register scratch,
|
|
SaveFPRegsMode save_fp,
|
|
RememberedSetFinalAction and_then);
|
|
|
|
// Check if object is in new space. Jumps if the object is not in new space.
|
|
// The register scratch can be object itself, but scratch will be clobbered.
|
|
void JumpIfNotInNewSpace(Register object, Register scratch, Label* branch) {
|
|
InNewSpace(object, scratch, eq, branch);
|
|
}
|
|
|
|
// Check if object is in new space. Jumps if the object is in new space.
|
|
// The register scratch can be object itself, but it will be clobbered.
|
|
void JumpIfInNewSpace(Register object, Register scratch, Label* branch) {
|
|
InNewSpace(object, scratch, ne, branch);
|
|
}
|
|
|
|
// Check if an object has a given incremental marking color.
|
|
void HasColor(Register object, Register scratch0, Register scratch1,
|
|
Label* has_color, int first_bit, int second_bit);
|
|
|
|
void JumpIfBlack(Register object, Register scratch0, Register scratch1,
|
|
Label* on_black);
|
|
|
|
// Checks the color of an object. If the object is white we jump to the
|
|
// incremental marker.
|
|
void JumpIfWhite(Register value, Register scratch1, Register scratch2,
|
|
Register scratch3, Label* value_is_white);
|
|
|
|
// Notify the garbage collector that we wrote a pointer into an object.
|
|
// |object| is the object being stored into, |value| is the object being
|
|
// stored. value and scratch registers are clobbered by the operation.
|
|
// The offset is the offset from the start of the object, not the offset from
|
|
// the tagged HeapObject pointer. For use with FieldMemOperand(reg, off).
|
|
void RecordWriteField(
|
|
Register object, int offset, Register value, Register scratch,
|
|
LinkRegisterStatus lr_status, SaveFPRegsMode save_fp,
|
|
RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
|
|
SmiCheck smi_check = INLINE_SMI_CHECK,
|
|
PointersToHereCheck pointers_to_here_check_for_value =
|
|
kPointersToHereMaybeInteresting);
|
|
|
|
// As above, but the offset has the tag presubtracted. For use with
|
|
// MemOperand(reg, off).
|
|
inline void RecordWriteContextSlot(
|
|
Register context, int offset, Register value, Register scratch,
|
|
LinkRegisterStatus lr_status, SaveFPRegsMode save_fp,
|
|
RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
|
|
SmiCheck smi_check = INLINE_SMI_CHECK,
|
|
PointersToHereCheck pointers_to_here_check_for_value =
|
|
kPointersToHereMaybeInteresting) {
|
|
RecordWriteField(context, offset + kHeapObjectTag, value, scratch,
|
|
lr_status, save_fp, remembered_set_action, smi_check,
|
|
pointers_to_here_check_for_value);
|
|
}
|
|
|
|
void RecordWriteForMap(Register object, Register map, Register dst,
|
|
LinkRegisterStatus lr_status, SaveFPRegsMode save_fp);
|
|
|
|
// For a given |object| notify the garbage collector that the slot |address|
|
|
// has been written. |value| is the object being stored. The value and
|
|
// address registers are clobbered by the operation.
|
|
void RecordWrite(
|
|
Register object, Register address, Register value,
|
|
LinkRegisterStatus lr_status, SaveFPRegsMode save_fp,
|
|
RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
|
|
SmiCheck smi_check = INLINE_SMI_CHECK,
|
|
PointersToHereCheck pointers_to_here_check_for_value =
|
|
kPointersToHereMaybeInteresting);
|
|
|
|
// Push and pop the registers that can hold pointers, as defined by the
|
|
// RegList constant kSafepointSavedRegisters.
|
|
void PushSafepointRegisters();
|
|
void PopSafepointRegisters();
|
|
|
|
// Enter exit frame.
|
|
// stack_space - extra stack space, used for alignment before call to C.
|
|
void EnterExitFrame(bool save_doubles, int stack_space = 0,
|
|
StackFrame::Type frame_type = StackFrame::EXIT);
|
|
|
|
// Leave the current exit frame. Expects the return value in r0.
|
|
// Expect the number of values, pushed prior to the exit frame, to
|
|
// remove in a register (or no_reg, if there is nothing to remove).
|
|
void LeaveExitFrame(bool save_doubles, Register argument_count,
|
|
bool restore_context,
|
|
bool argument_count_is_length = false);
|
|
|
|
// Load the global object from the current context.
|
|
void LoadGlobalObject(Register dst) {
|
|
LoadNativeContextSlot(Context::EXTENSION_INDEX, dst);
|
|
}
|
|
|
|
// Load the global proxy from the current context.
|
|
void LoadGlobalProxy(Register dst) {
|
|
LoadNativeContextSlot(Context::GLOBAL_PROXY_INDEX, dst);
|
|
}
|
|
|
|
void LoadNativeContextSlot(int index, Register dst);
|
|
|
|
// Load the initial map from the global function. The registers
|
|
// function and map can be the same, function is then overwritten.
|
|
void LoadGlobalFunctionInitialMap(Register function,
|
|
Register map,
|
|
Register scratch);
|
|
|
|
// ---------------------------------------------------------------------------
|
|
// JavaScript invokes
|
|
|
|
// Invoke the JavaScript function code by either calling or jumping.
|
|
void InvokeFunctionCode(Register function, Register new_target,
|
|
const ParameterCount& expected,
|
|
const ParameterCount& actual, InvokeFlag flag);
|
|
|
|
// On function call, call into the debugger if necessary.
|
|
void CheckDebugHook(Register fun, Register new_target,
|
|
const ParameterCount& expected,
|
|
const ParameterCount& actual);
|
|
|
|
// Invoke the JavaScript function in the given register. Changes the
|
|
// current context to the context in the function before invoking.
|
|
void InvokeFunction(Register function, Register new_target,
|
|
const ParameterCount& actual, InvokeFlag flag);
|
|
|
|
void InvokeFunction(Register function, const ParameterCount& expected,
|
|
const ParameterCount& actual, InvokeFlag flag);
|
|
|
|
void InvokeFunction(Handle<JSFunction> function,
|
|
const ParameterCount& expected,
|
|
const ParameterCount& actual, InvokeFlag flag);
|
|
|
|
// Frame restart support
|
|
void MaybeDropFrames();
|
|
|
|
// Exception handling
|
|
|
|
// Push a new stack handler and link into stack handler chain.
|
|
void PushStackHandler();
|
|
|
|
// Unlink the stack handler on top of the stack from the stack handler chain.
|
|
// Must preserve the result register.
|
|
void PopStackHandler();
|
|
|
|
// ---------------------------------------------------------------------------
|
|
// Allocation support
|
|
|
|
// Allocate an object in new space or old space. The object_size is
|
|
// specified either in bytes or in words if the allocation flag SIZE_IN_WORDS
|
|
// is passed. If the space is exhausted control continues at the gc_required
|
|
// label. The allocated object is returned in result. If the flag
|
|
// tag_allocated_object is true the result is tagged as as a heap object.
|
|
// All registers are clobbered also when control continues at the gc_required
|
|
// label.
|
|
void Allocate(int object_size,
|
|
Register result,
|
|
Register scratch1,
|
|
Register scratch2,
|
|
Label* gc_required,
|
|
AllocationFlags flags);
|
|
|
|
// Allocate and initialize a JSValue wrapper with the specified {constructor}
|
|
// and {value}.
|
|
void AllocateJSValue(Register result, Register constructor, Register value,
|
|
Register scratch1, Register scratch2,
|
|
Label* gc_required);
|
|
|
|
// ---------------------------------------------------------------------------
|
|
// Support functions.
|
|
|
|
// Machine code version of Map::GetConstructor().
|
|
// |temp| holds |result|'s map when done, and |temp2| its instance type.
|
|
void GetMapConstructor(Register result, Register map, Register temp,
|
|
Register temp2);
|
|
|
|
// Compare object type for heap object. heap_object contains a non-Smi
|
|
// whose object type should be compared with the given type. This both
|
|
// sets the flags and leaves the object type in the type_reg register.
|
|
// It leaves the map in the map register (unless the type_reg and map register
|
|
// are the same register). It leaves the heap object in the heap_object
|
|
// register unless the heap_object register is the same register as one of the
|
|
// other registers.
|
|
// Type_reg can be no_reg. In that case a scratch register is used.
|
|
void CompareObjectType(Register heap_object,
|
|
Register map,
|
|
Register type_reg,
|
|
InstanceType type);
|
|
|
|
// Compare instance type in a map. map contains a valid map object whose
|
|
// object type should be compared with the given type. This both
|
|
// sets the flags and leaves the object type in the type_reg register.
|
|
void CompareInstanceType(Register map,
|
|
Register type_reg,
|
|
InstanceType type);
|
|
|
|
// Compare an object's map with the specified map and its transitioned
|
|
// elements maps if mode is ALLOW_ELEMENT_TRANSITION_MAPS. Condition flags are
|
|
// set with result of map compare. If multiple map compares are required, the
|
|
// compare sequences branches to early_success.
|
|
void CompareMap(Register obj,
|
|
Register scratch,
|
|
Handle<Map> map,
|
|
Label* early_success);
|
|
|
|
// As above, but the map of the object is already loaded into the register
|
|
// which is preserved by the code generated.
|
|
void CompareMap(Register obj_map,
|
|
Handle<Map> map,
|
|
Label* early_success);
|
|
|
|
// Check if the map of an object is equal to a specified map and branch to
|
|
// label if not. Skip the smi check if not required (object is known to be a
|
|
// heap object). If mode is ALLOW_ELEMENT_TRANSITION_MAPS, then also match
|
|
// against maps that are ElementsKind transition maps of the specified map.
|
|
void CheckMap(Register obj,
|
|
Register scratch,
|
|
Handle<Map> map,
|
|
Label* fail,
|
|
SmiCheckType smi_check_type);
|
|
|
|
|
|
void CheckMap(Register obj,
|
|
Register scratch,
|
|
Heap::RootListIndex index,
|
|
Label* fail,
|
|
SmiCheckType smi_check_type);
|
|
|
|
void GetWeakValue(Register value, Handle<WeakCell> cell);
|
|
|
|
// Load the value of the weak cell in the value register. Branch to the given
|
|
// miss label if the weak cell was cleared.
|
|
void LoadWeakValue(Register value, Handle<WeakCell> cell, Label* miss);
|
|
|
|
// Compare the object in a register to a value from the root list.
|
|
// Acquires a scratch register.
|
|
void CompareRoot(Register obj, Heap::RootListIndex index);
|
|
void PushRoot(Heap::RootListIndex index) {
|
|
UseScratchRegisterScope temps(this);
|
|
Register scratch = temps.Acquire();
|
|
LoadRoot(scratch, index);
|
|
Push(scratch);
|
|
}
|
|
|
|
// Compare the object in a register to a value and jump if they are equal.
|
|
void JumpIfRoot(Register with, Heap::RootListIndex index, Label* if_equal) {
|
|
CompareRoot(with, index);
|
|
b(eq, if_equal);
|
|
}
|
|
|
|
// Compare the object in a register to a value and jump if they are not equal.
|
|
void JumpIfNotRoot(Register with, Heap::RootListIndex index,
|
|
Label* if_not_equal) {
|
|
CompareRoot(with, index);
|
|
b(ne, if_not_equal);
|
|
}
|
|
|
|
// Load the value of a smi object into a double register.
|
|
// The register value must be between d0 and d15.
|
|
void SmiToDouble(LowDwVfpRegister value, Register smi);
|
|
|
|
// Try to convert a double to a signed 32-bit integer.
|
|
// Z flag set to one and result assigned if the conversion is exact.
|
|
void TryDoubleToInt32Exact(Register result,
|
|
DwVfpRegister double_input,
|
|
LowDwVfpRegister double_scratch);
|
|
|
|
// ---------------------------------------------------------------------------
|
|
// Runtime calls
|
|
|
|
// Call a code stub.
|
|
void CallStub(CodeStub* stub,
|
|
Condition cond = al);
|
|
|
|
// Call a code stub.
|
|
void TailCallStub(CodeStub* stub, Condition cond = al);
|
|
|
|
// Call a runtime routine.
|
|
void CallRuntime(const Runtime::Function* f,
|
|
int num_arguments,
|
|
SaveFPRegsMode save_doubles = kDontSaveFPRegs);
|
|
|
|
// Convenience function: Same as above, but takes the fid instead.
|
|
void CallRuntime(Runtime::FunctionId fid,
|
|
SaveFPRegsMode save_doubles = kDontSaveFPRegs) {
|
|
const Runtime::Function* function = Runtime::FunctionForId(fid);
|
|
CallRuntime(function, function->nargs, save_doubles);
|
|
}
|
|
|
|
// Convenience function: Same as above, but takes the fid instead.
|
|
void CallRuntime(Runtime::FunctionId fid, int num_arguments,
|
|
SaveFPRegsMode save_doubles = kDontSaveFPRegs) {
|
|
CallRuntime(Runtime::FunctionForId(fid), num_arguments, save_doubles);
|
|
}
|
|
|
|
// Convenience function: tail call a runtime routine (jump).
|
|
void TailCallRuntime(Runtime::FunctionId fid);
|
|
|
|
// Jump to a runtime routine.
|
|
void JumpToExternalReference(const ExternalReference& builtin,
|
|
bool builtin_exit_frame = false);
|
|
|
|
// ---------------------------------------------------------------------------
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// StatsCounter support
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void IncrementCounter(StatsCounter* counter, int value,
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Register scratch1, Register scratch2);
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void DecrementCounter(StatsCounter* counter, int value,
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Register scratch1, Register scratch2);
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// ---------------------------------------------------------------------------
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// Smi utilities
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void SmiTag(Register reg, SBit s = LeaveCC);
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void SmiTag(Register dst, Register src, SBit s = LeaveCC);
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// Untag the source value into destination and jump if source is a smi.
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// Souce and destination can be the same register.
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void UntagAndJumpIfSmi(Register dst, Register src, Label* smi_case);
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// Test if the register contains a smi (Z == 0 (eq) if true).
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void SmiTst(Register value);
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// Jump if either of the registers contain a non-smi.
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void JumpIfNotSmi(Register value, Label* not_smi_label);
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// Jump if either of the registers contain a smi.
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void JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi);
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// Abort execution if argument is a smi, enabled via --debug-code.
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void AssertNotSmi(Register object);
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void AssertSmi(Register object);
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// Abort execution if argument is not a FixedArray, enabled via --debug-code.
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void AssertFixedArray(Register object);
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// Abort execution if argument is not a JSFunction, enabled via --debug-code.
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void AssertFunction(Register object);
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// Abort execution if argument is not a JSBoundFunction,
|
|
// enabled via --debug-code.
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void AssertBoundFunction(Register object);
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|
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// Abort execution if argument is not a JSGeneratorObject (or subclass),
|
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// enabled via --debug-code.
|
|
void AssertGeneratorObject(Register object);
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|
|
// Abort execution if argument is not undefined or an AllocationSite, enabled
|
|
// via --debug-code.
|
|
void AssertUndefinedOrAllocationSite(Register object, Register scratch);
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|
|
|
// ---------------------------------------------------------------------------
|
|
// String utilities
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|
|
|
// Checks if both objects are sequential one-byte strings and jumps to label
|
|
// if either is not. Assumes that neither object is a smi.
|
|
void JumpIfNonSmisNotBothSequentialOneByteStrings(Register object1,
|
|
Register object2,
|
|
Register scratch1,
|
|
Register scratch2,
|
|
Label* failure);
|
|
|
|
// Checks if both instance types are sequential one-byte strings and jumps to
|
|
// label if either is not.
|
|
void JumpIfBothInstanceTypesAreNotSequentialOneByte(
|
|
Register first_object_instance_type, Register second_object_instance_type,
|
|
Register scratch1, Register scratch2, Label* failure);
|
|
|
|
void JumpIfNotUniqueNameInstanceType(Register reg, Label* not_unique_name);
|
|
|
|
void LoadInstanceDescriptors(Register map, Register descriptors);
|
|
void LoadAccessor(Register dst, Register holder, int accessor_index,
|
|
AccessorComponent accessor);
|
|
|
|
template<typename Field>
|
|
void DecodeField(Register dst, Register src) {
|
|
Ubfx(dst, src, Field::kShift, Field::kSize);
|
|
}
|
|
|
|
template<typename Field>
|
|
void DecodeField(Register reg) {
|
|
DecodeField<Field>(reg, reg);
|
|
}
|
|
|
|
void EnterBuiltinFrame(Register context, Register target, Register argc);
|
|
void LeaveBuiltinFrame(Register context, Register target, Register argc);
|
|
|
|
private:
|
|
// Helper functions for generating invokes.
|
|
void InvokePrologue(const ParameterCount& expected,
|
|
const ParameterCount& actual, Label* done,
|
|
bool* definitely_mismatches, InvokeFlag flag);
|
|
|
|
// Helper for implementing JumpIfNotInNewSpace and JumpIfInNewSpace.
|
|
void InNewSpace(Register object,
|
|
Register scratch,
|
|
Condition cond, // eq for new space, ne otherwise.
|
|
Label* branch);
|
|
|
|
// Helper for finding the mark bits for an address. Afterwards, the
|
|
// bitmap register points at the word with the mark bits and the mask
|
|
// the position of the first bit. Leaves addr_reg unchanged.
|
|
inline void GetMarkBits(Register addr_reg,
|
|
Register bitmap_reg,
|
|
Register mask_reg);
|
|
|
|
// Compute memory operands for safepoint stack slots.
|
|
static int SafepointRegisterStackIndex(int reg_code);
|
|
|
|
// Needs access to SafepointRegisterStackIndex for compiled frame
|
|
// traversal.
|
|
friend class StandardFrame;
|
|
};
|
|
|
|
// The code patcher is used to patch (typically) small parts of code e.g. for
|
|
// debugging and other types of instrumentation. When using the code patcher
|
|
// the exact number of bytes specified must be emitted. It is not legal to emit
|
|
// relocation information. If any of these constraints are violated it causes
|
|
// an assertion to fail.
|
|
class CodePatcher {
|
|
public:
|
|
enum FlushICache {
|
|
FLUSH,
|
|
DONT_FLUSH
|
|
};
|
|
|
|
CodePatcher(Isolate* isolate, byte* address, int instructions,
|
|
FlushICache flush_cache = FLUSH);
|
|
~CodePatcher();
|
|
|
|
// Macro assembler to emit code.
|
|
MacroAssembler* masm() { return &masm_; }
|
|
|
|
// Emit an instruction directly.
|
|
void Emit(Instr instr);
|
|
|
|
// Emit an address directly.
|
|
void Emit(Address addr);
|
|
|
|
// Emit the condition part of an instruction leaving the rest of the current
|
|
// instruction unchanged.
|
|
void EmitCondition(Condition cond);
|
|
|
|
private:
|
|
byte* address_; // The address of the code being patched.
|
|
int size_; // Number of bytes of the expected patch size.
|
|
MacroAssembler masm_; // Macro assembler used to generate the code.
|
|
FlushICache flush_cache_; // Whether to flush the I cache after patching.
|
|
};
|
|
|
|
|
|
// -----------------------------------------------------------------------------
|
|
// Static helper functions.
|
|
|
|
inline MemOperand ContextMemOperand(Register context, int index = 0) {
|
|
return MemOperand(context, Context::SlotOffset(index));
|
|
}
|
|
|
|
|
|
inline MemOperand NativeContextMemOperand() {
|
|
return ContextMemOperand(cp, Context::NATIVE_CONTEXT_INDEX);
|
|
}
|
|
|
|
#define ACCESS_MASM(masm) masm->
|
|
|
|
} // namespace internal
|
|
} // namespace v8
|
|
|
|
#endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_
|
|
|