/* * Code generated from Atmel Start. * * This file will be overwritten when reconfiguring your Atmel Start project. * Please copy examples or other code you want to keep to a separate file * to avoid losing it when reconfiguring. */ #include "driver_init.h" #include #include #include #include #include /*! The buffer size for USART */ #define USART_ASYNC_SERCOM2_BUFFER_SIZE 16 struct timer_descriptor TIMER_0; struct spi_m_sync_descriptor SPI_M_SYNC_SERCOM0; struct usart_async_descriptor USART_ASYNC_SERCOM2; static uint8_t USART_ASYNC_SERCOM2_buffer[USART_ASYNC_SERCOM2_BUFFER_SIZE]; struct adc_sync_descriptor ADC_0; struct dac_sync_descriptor DAC_0; struct flash_descriptor FLASH_0; struct i2c_m_sync_desc I2C_M_SERCOM1; struct spi_m_dma_descriptor SPI_M_DMA_SERCOM3; struct pwm_descriptor PWM_0; struct rand_sync_desc RAND_0; void ADC_0_PORT_init(void) { } void ADC_0_CLOCK_init(void) { hri_mclk_set_APBDMASK_ADC0_bit(MCLK); hri_gclk_write_PCHCTRL_reg(GCLK, ADC0_GCLK_ID, CONF_GCLK_ADC0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); } void ADC_0_init(void) { ADC_0_CLOCK_init(); ADC_0_PORT_init(); adc_sync_init(&ADC_0, ADC0, (void *)NULL); } void DAC_0_PORT_init(void) { } void DAC_0_CLOCK_init(void) { hri_mclk_set_APBDMASK_DAC_bit(MCLK); hri_gclk_write_PCHCTRL_reg(GCLK, DAC_GCLK_ID, CONF_GCLK_DAC_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); } void DAC_0_init(void) { DAC_0_CLOCK_init(); dac_sync_init(&DAC_0, DAC); DAC_0_PORT_init(); } void EVENT_SYSTEM_0_init(void) { hri_mclk_set_APBBMASK_EVSYS_bit(MCLK); event_system_init(); } void FLASH_0_CLOCK_init(void) { hri_mclk_set_AHBMASK_NVMCTRL_bit(MCLK); } void FLASH_0_init(void) { FLASH_0_CLOCK_init(); flash_init(&FLASH_0, NVMCTRL); } /** * \brief Timer initialization function * * Enables Timer peripheral, clocks and initializes Timer driver */ static void TIMER_0_init(void) { hri_mclk_set_APBAMASK_RTC_bit(MCLK); timer_init(&TIMER_0, RTC, _rtc_get_timer()); } void SPI_M_SYNC_SERCOM0_PORT_init(void) { // Set pin direction to output gpio_set_pin_direction(PA04, GPIO_DIRECTION_OUT); gpio_set_pin_level(PA04, // Initial level // pad_initial_level // Low // High false); gpio_set_pin_function(PA04, PINMUX_PA04D_SERCOM0_PAD0); // Set pin direction to output gpio_set_pin_direction(PA05, GPIO_DIRECTION_OUT); gpio_set_pin_level(PA05, // Initial level // pad_initial_level // Low // High false); gpio_set_pin_function(PA05, PINMUX_PA05D_SERCOM0_PAD1); // Set pin direction to input gpio_set_pin_direction(PA06, GPIO_DIRECTION_IN); gpio_set_pin_pull_mode(PA06, // Pull configuration // pad_pull_config // Off // Pull-up // Pull-down GPIO_PULL_OFF); gpio_set_pin_function(PA06, PINMUX_PA06D_SERCOM0_PAD2); } void SPI_M_SYNC_SERCOM0_CLOCK_init(void) { hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_CORE, CONF_GCLK_SERCOM0_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_SLOW, CONF_GCLK_SERCOM0_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); hri_mclk_set_APBAMASK_SERCOM0_bit(MCLK); } void SPI_M_SYNC_SERCOM0_init(void) { SPI_M_SYNC_SERCOM0_CLOCK_init(); spi_m_sync_init(&SPI_M_SYNC_SERCOM0, SERCOM0); SPI_M_SYNC_SERCOM0_PORT_init(); } void I2C_M_SERCOM1_PORT_init(void) { gpio_set_pin_pull_mode(PA16, // Pull configuration // pad_pull_config // Off // Pull-up // Pull-down GPIO_PULL_OFF); gpio_set_pin_function(PA16, PINMUX_PA16C_SERCOM1_PAD0); gpio_set_pin_pull_mode(PA17, // Pull configuration // pad_pull_config // Off // Pull-up // Pull-down GPIO_PULL_OFF); gpio_set_pin_function(PA17, PINMUX_PA17C_SERCOM1_PAD1); } void I2C_M_SERCOM1_CLOCK_init(void) { hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM1_GCLK_ID_CORE, CONF_GCLK_SERCOM1_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM1_GCLK_ID_SLOW, CONF_GCLK_SERCOM1_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); hri_mclk_set_APBAMASK_SERCOM1_bit(MCLK); } void I2C_M_SERCOM1_init(void) { I2C_M_SERCOM1_CLOCK_init(); i2c_m_sync_init(&I2C_M_SERCOM1, SERCOM1); I2C_M_SERCOM1_PORT_init(); } /** * \brief USART Clock initialization function * * Enables register interface and peripheral clock */ void USART_ASYNC_SERCOM2_CLOCK_init() { hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM2_GCLK_ID_CORE, CONF_GCLK_SERCOM2_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM2_GCLK_ID_SLOW, CONF_GCLK_SERCOM2_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); hri_mclk_set_APBBMASK_SERCOM2_bit(MCLK); } /** * \brief USART pinmux initialization function * * Set each required pin to USART functionality */ void USART_ASYNC_SERCOM2_PORT_init() { gpio_set_pin_function(PA09, PINMUX_PA09D_SERCOM2_PAD0); gpio_set_pin_function(PA08, PINMUX_PA08D_SERCOM2_PAD1); } /** * \brief USART initialization function * * Enables USART peripheral, clocks and initializes USART driver */ void USART_ASYNC_SERCOM2_init(void) { USART_ASYNC_SERCOM2_CLOCK_init(); usart_async_init( &USART_ASYNC_SERCOM2, SERCOM2, USART_ASYNC_SERCOM2_buffer, USART_ASYNC_SERCOM2_BUFFER_SIZE, (void *)NULL); USART_ASYNC_SERCOM2_PORT_init(); } void SPI_M_DMA_SERCOM3_PORT_init(void) { // Set pin direction to output gpio_set_pin_direction(PA22, GPIO_DIRECTION_OUT); gpio_set_pin_level(PA22, // Initial level // pad_initial_level // Low // High false); gpio_set_pin_function(PA22, PINMUX_PA22C_SERCOM3_PAD0); // Set pin direction to output gpio_set_pin_direction(PA23, GPIO_DIRECTION_OUT); gpio_set_pin_level(PA23, // Initial level // pad_initial_level // Low // High false); gpio_set_pin_function(PA23, PINMUX_PA23C_SERCOM3_PAD1); // Set pin direction to input gpio_set_pin_direction(PA18, GPIO_DIRECTION_IN); gpio_set_pin_pull_mode(PA18, // Pull configuration // pad_pull_config // Off // Pull-up // Pull-down GPIO_PULL_OFF); gpio_set_pin_function(PA18, PINMUX_PA18D_SERCOM3_PAD2); } void SPI_M_DMA_SERCOM3_CLOCK_init(void) { hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_CORE, CONF_GCLK_SERCOM3_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_SLOW, CONF_GCLK_SERCOM3_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); hri_mclk_set_APBBMASK_SERCOM3_bit(MCLK); } void SPI_M_DMA_SERCOM3_init(void) { SPI_M_DMA_SERCOM3_CLOCK_init(); spi_m_dma_init(&SPI_M_DMA_SERCOM3, SERCOM3); SPI_M_DMA_SERCOM3_PORT_init(); } void delay_driver_init(void) { delay_init(SysTick); } void PWM_0_PORT_init(void) { } void PWM_0_CLOCK_init(void) { hri_mclk_set_APBAMASK_TC0_bit(MCLK); hri_gclk_write_PCHCTRL_reg(GCLK, TC0_GCLK_ID, CONF_GCLK_TC0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); } void PWM_0_init(void) { PWM_0_CLOCK_init(); PWM_0_PORT_init(); pwm_init(&PWM_0, TC0, _tc_get_pwm()); } void RAND_0_CLOCK_init(void) { hri_mclk_set_APBCMASK_TRNG_bit(MCLK); } void RAND_0_init(void) { RAND_0_CLOCK_init(); rand_sync_init(&RAND_0, TRNG); } void USB_DEVICE_INSTANCE_PORT_init(void) { gpio_set_pin_direction(PA24, // Pin direction // pad_direction // Off // In // Out GPIO_DIRECTION_OUT); gpio_set_pin_level(PA24, // Initial level // pad_initial_level // Low // High false); gpio_set_pin_pull_mode(PA24, // Pull configuration // pad_pull_config // Off // Pull-up // Pull-down GPIO_PULL_OFF); gpio_set_pin_function(PA24, // Pin function // pad_function // Auto : use driver pinmux if signal is imported by driver, else turn off function // Auto // Off // A // B // C // D // E // F // G // H // I // J // K // L // M // N PINMUX_PA24H_USB_DM); gpio_set_pin_direction(PA25, // Pin direction // pad_direction // Off // In // Out GPIO_DIRECTION_OUT); gpio_set_pin_level(PA25, // Initial level // pad_initial_level // Low // High false); gpio_set_pin_pull_mode(PA25, // Pull configuration // pad_pull_config // Off // Pull-up // Pull-down GPIO_PULL_OFF); gpio_set_pin_function(PA25, // Pin function // pad_function // Auto : use driver pinmux if signal is imported by driver, else turn off function // Auto // Off // A // B // C // D // E // F // G // H // I // J // K // L // M // N PINMUX_PA25H_USB_DP); } /* The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock * for low speed and full speed operation. */ #if (CONF_GCLK_USB_FREQUENCY > (48000000 + 48000000 / 400)) || (CONF_GCLK_USB_FREQUENCY < (48000000 - 48000000 / 400)) #warning USB clock should be 48MHz ~ 0.25% clock, check your configuration! #endif void USB_DEVICE_INSTANCE_CLOCK_init(void) { hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, CONF_GCLK_USB_SRC | GCLK_PCHCTRL_CHEN); hri_mclk_set_AHBMASK_USB_bit(MCLK); hri_mclk_set_APBBMASK_USB_bit(MCLK); } void USB_DEVICE_INSTANCE_init(void) { USB_DEVICE_INSTANCE_CLOCK_init(); usb_d_init(); USB_DEVICE_INSTANCE_PORT_init(); } void system_init(void) { init_mcu(); ADC_0_init(); DAC_0_init(); EVENT_SYSTEM_0_init(); FLASH_0_init(); TIMER_0_init(); SPI_M_SYNC_SERCOM0_init(); I2C_M_SERCOM1_init(); USART_ASYNC_SERCOM2_init(); SPI_M_DMA_SERCOM3_init(); delay_driver_init(); PWM_0_init(); RAND_0_init(); USB_DEVICE_INSTANCE_init(); }