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1152 lines
39 KiB
1152 lines
39 KiB
format_version: '2'
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name: My Project
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board:
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identifier: CustomBoard
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device: SAMD21G18A-MF
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details: null
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application: null
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middlewares:
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USB_CHAPTER_9:
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user_label: USB_CHAPTER_9
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configuration: {}
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definition: Atmel:USB:0.0.1::USB_Chapter_9
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functionality: USB_Chapter_9
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api: USB:Protocol:Core
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dependencies: {}
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USB_CLASS_HUB:
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user_label: USB_CLASS_HUB
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configuration: {}
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definition: Atmel:USB:0.0.1::USB_Class_HUB
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functionality: USB_Class_HUB
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api: USB:Protocol:HUB
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dependencies:
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USB Chapter 9: USB_CHAPTER_9
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USB_CLASS_HID:
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user_label: USB_CLASS_HID
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configuration: {}
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definition: Atmel:USB:0.0.1::USB_Class_HID
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functionality: USB_Class_HID
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api: USB:Protocol:HID
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dependencies:
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USB Chapter 9: USB_CHAPTER_9
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USB_CLASS_CDC:
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user_label: USB_CLASS_CDC
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configuration: {}
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definition: Atmel:USB:0.0.1::USB_Class_CDC
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functionality: USB_Class_CDC
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api: USB:Protocol:CDC
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dependencies:
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USB Chapter 9: USB_CHAPTER_9
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USB_CLASS_MSC:
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user_label: USB_CLASS_MSC
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configuration: {}
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definition: Atmel:USB:0.0.1::USB_Class_MSC
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functionality: USB_Class_Mass_Storage_(MSC)
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api: USB:Protocol:MSC
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dependencies:
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USB Chapter 9: USB_CHAPTER_9
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USB_CLASS_VENDOR:
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user_label: USB_CLASS_VENDOR
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configuration: {}
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definition: Atmel:USB:0.0.1::USB_Class_VENDOR
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functionality: USB_Class_VENDOR
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api: USB:Protocol:VENDOR
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dependencies:
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USB Chapter 9: USB_CHAPTER_9
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USB_DEVICE_STACK_CORE_INSTANCE:
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user_label: USB_DEVICE_STACK_CORE_INSTANCE
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configuration:
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usbd_hs_sp: false
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definition: Atmel:USB:0.0.1::USB_Device_Core
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functionality: USB_Device_Core
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api: USB:Device:Core
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dependencies:
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USB Chapter 9: USB_CHAPTER_9
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USB Device instance: USB_0
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USB_DEVICE_COMPOSITE_0:
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user_label: USB_DEVICE_COMPOSITE_0
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configuration:
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conf_usb_composite_cdc_echo_demo: false
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conf_usb_composite_hid_keyboard_demo: false
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conf_usb_composite_hid_mouse_demo: false
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conf_usb_msc_lun0_capacity: 22
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conf_usb_msc_lun0_enable: true
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conf_usb_msc_lun0_rmb: true
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conf_usb_msc_lun1_enable: false
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conf_usb_msc_lun1_rmb: true
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conf_usb_msc_lun2_capacity: 22
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conf_usb_msc_lun2_enable: false
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conf_usb_msc_lun2_rmb: true
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conf_usb_msc_lun3_capacity: 22
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conf_usb_msc_lun3_enable: false
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conf_usb_msc_lun3_rmb: true
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conf_usb_msc_lun_buf_sectors: 4
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usb_composite_bcddevice: 256
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usb_composite_bcdusb: USB 2.0 version
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usb_composite_bconfigval: 1
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usb_composite_bmattri: Bus power supply, not support for remote wakeup
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usb_composite_bmaxpksz0: 64 bytes
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usb_composite_bmaxpower: 50
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usb_composite_bnumconfig: 1
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usb_composite_cdc_acm_comm_int_maxpksz: 64 bytes
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usb_composite_cdc_acm_data_buckout_maxpksz: 64 bytes
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usb_composite_cdc_acm_data_buckout_maxpksz_hs: 512 bytes
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usb_composite_cdc_acm_data_builin_maxpksz: 64 bytes
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usb_composite_cdc_acm_data_builin_maxpksz_hs: 512 bytes
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usb_composite_cdc_acm_data_bulkin_epaddr: EndpointAddress = 0x81
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usb_composite_cdc_acm_data_bulkout_epaddr: EndpointAddress = 0x01
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usb_composite_cdc_acm_epaddr: EndpointAddress = 0x82
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usb_composite_cdc_acm_support: true
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usb_composite_hid_generic_intin_epaddr: EndpointAddress = 0x85
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usb_composite_hid_generic_intin_maxpksz: 64 bytes
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usb_composite_hid_generic_intout_epaddr: EndpointAddress = 0x03
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usb_composite_hid_generic_intout_maxpksz: 64 bytes
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usb_composite_hid_generic_support: false
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usb_composite_hid_keyboard_intin_epaddr: EndpointAddress = 0x84
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usb_composite_hid_keyboard_intin_maxpksz: 8 bytes
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usb_composite_hid_keyboard_intout_epaddr: EndpointAddress = 0x02
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usb_composite_hid_keyboard_intout_maxpksz: 8 bytes
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usb_composite_hid_keyboard_support: false
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usb_composite_hid_mouse_intin_epaddr: EndpointAddress = 0x83
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usb_composite_hid_mouse_intin_maxpksz: 8 bytes
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usb_composite_hid_mouse_support: false
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usb_composite_iconfig_en: false
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usb_composite_iconfig_str: ''
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usb_composite_idproduct: 9249
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usb_composite_idvender: 1003
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usb_composite_imanufact_en: false
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usb_composite_imanufact_str: Atmel
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usb_composite_iproduct_en: false
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usb_composite_iproduct_str: Composite Demo
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usb_composite_iserialnum_en: false
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usb_composite_iserialnum_str: 123456789ABCDEF
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usb_composite_langid: '0x0409'
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usb_composite_msc_bulk_maxpksz: 64 bytes
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usb_composite_msc_bulk_maxpksz_hs: 512 bytes
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usb_composite_msc_bulkin_epaddr: EndpointAddress = 0x86
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usb_composite_msc_bulkout_epaddr: EndpointAddress = 0x04
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usb_composite_msc_demo_en: true
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usb_composite_msc_support: false
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usb_composite_str_en: false
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definition: Atmel:USB:0.0.1::USB_Device_Composite
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functionality: USB_Device_COMPOSITE
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api: USB:Device:COMPOSITE
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dependencies:
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USB Class MSC: USB_CLASS_MSC
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USB Class CDC: USB_CLASS_CDC
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USB Device Stack Core Instance: USB_DEVICE_STACK_CORE_INSTANCE
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USB Class VENDOR: USB_CLASS_VENDOR
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USB Class HID: USB_CLASS_HID
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USB Class HUB: USB_CLASS_HUB
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drivers:
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ADC_0:
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user_label: ADC_0
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definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::ADC::driver_config_definition::ADC::HAL:Driver:ADC.Sync
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functionality: ADC
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api: HAL:Driver:ADC_Sync
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configuration:
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adc_advanced_settings: false
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adc_arch_adjres: 0
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adc_arch_corren: false
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adc_arch_dbgrun: false
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adc_arch_event_settings: false
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adc_arch_gain: 1x
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adc_arch_gaincorr: 0
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adc_arch_inputoffset: 0
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adc_arch_inputscan: 0
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adc_arch_leftadj: false
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adc_arch_offsetcorr: 0
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adc_arch_refcomp: false
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adc_arch_resrdyeo: false
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adc_arch_runstdby: false
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adc_arch_samplen: 0
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adc_arch_samplenum: 1 sample
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adc_arch_startei: false
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adc_arch_syncei: false
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adc_arch_winlt: 0
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adc_arch_winmode: No window mode
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adc_arch_winmoneo: false
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adc_arch_winut: 0
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adc_differential_mode: false
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adc_freerunning_mode: false
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adc_pinmux_negative: ADC AIN0 pin
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adc_pinmux_positive: ADC AIN0 pin
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adc_prescaler: Peripheral clock divided by 4
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adc_reference: 1.0V voltage reference
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adc_resolution: 12-bit
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optional_signals: []
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variant: null
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clocks:
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domain_group:
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nodes:
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- name: ADC
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input: Generic clock generator 0
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configuration:
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adc_gclk_selection: Generic clock generator 0
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GCLK:
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user_label: GCLK
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definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::GCLK::driver_config_definition::GCLK::HAL:HPL:GCLK
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functionality: System
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api: HAL:HPL:GCLK
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configuration:
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enable_gclk_gen_0: true
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enable_gclk_gen_1: true
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enable_gclk_gen_2: false
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enable_gclk_gen_3: false
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enable_gclk_gen_4: false
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enable_gclk_gen_5: false
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enable_gclk_gen_6: false
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enable_gclk_gen_7: false
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gclk_arch_gen_0_RUNSTDBY: false
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gclk_arch_gen_0_enable: true
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gclk_arch_gen_0_idc: false
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gclk_arch_gen_0_oe: false
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gclk_arch_gen_0_oov: false
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gclk_arch_gen_1_RUNSTDBY: false
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gclk_arch_gen_1_enable: true
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gclk_arch_gen_1_idc: false
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gclk_arch_gen_1_oe: false
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gclk_arch_gen_1_oov: false
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gclk_arch_gen_2_RUNSTDBY: false
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gclk_arch_gen_2_enable: false
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gclk_arch_gen_2_idc: false
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gclk_arch_gen_2_oe: false
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gclk_arch_gen_2_oov: false
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gclk_arch_gen_3_RUNSTDBY: false
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gclk_arch_gen_3_enable: false
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gclk_arch_gen_3_idc: false
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gclk_arch_gen_3_oe: false
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gclk_arch_gen_3_oov: false
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gclk_arch_gen_4_RUNSTDBY: false
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gclk_arch_gen_4_enable: false
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gclk_arch_gen_4_idc: false
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gclk_arch_gen_4_oe: false
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gclk_arch_gen_4_oov: false
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gclk_arch_gen_5_RUNSTDBY: false
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gclk_arch_gen_5_enable: false
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gclk_arch_gen_5_idc: false
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gclk_arch_gen_5_oe: false
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gclk_arch_gen_5_oov: false
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gclk_arch_gen_6_RUNSTDBY: false
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gclk_arch_gen_6_enable: false
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gclk_arch_gen_6_idc: false
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gclk_arch_gen_6_oe: false
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gclk_arch_gen_6_oov: false
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gclk_arch_gen_7_RUNSTDBY: false
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gclk_arch_gen_7_enable: false
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gclk_arch_gen_7_idc: false
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gclk_arch_gen_7_oe: false
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gclk_arch_gen_7_oov: false
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gclk_gen_0_div: 1
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gclk_gen_0_div_sel: false
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gclk_gen_0_oscillator: Digital Frequency Locked Loop (DFLL48M)
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gclk_gen_1_div: 1
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gclk_gen_1_div_sel: false
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gclk_gen_1_oscillator: External Crystal Oscillator 0.4-32MHz (XOSC)
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gclk_gen_2_div: 1
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gclk_gen_2_div_sel: false
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gclk_gen_2_oscillator: External Crystal Oscillator 0.4-32MHz (XOSC)
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gclk_gen_3_div: 1
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gclk_gen_3_div_sel: false
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gclk_gen_3_oscillator: External Crystal Oscillator 0.4-32MHz (XOSC)
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gclk_gen_4_div: 1
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gclk_gen_4_div_sel: false
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gclk_gen_4_oscillator: 32kHz Ultra Low Power Internal Oscillator (OSCULP32K)
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gclk_gen_5_div: 1
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gclk_gen_5_div_sel: false
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gclk_gen_5_oscillator: External Crystal Oscillator 0.4-32MHz (XOSC)
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gclk_gen_6_div: 1
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gclk_gen_6_div_sel: false
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gclk_gen_6_oscillator: External Crystal Oscillator 0.4-32MHz (XOSC)
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gclk_gen_7_div: 1
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gclk_gen_7_div_sel: false
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gclk_gen_7_oscillator: External Crystal Oscillator 0.4-32MHz (XOSC)
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optional_signals: []
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variant: null
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clocks:
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domain_group: null
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FLASH_0:
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user_label: FLASH_0
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definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::NVMCTRL::driver_config_definition::Flash::HAL:Driver:FLASH
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functionality: Flash
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api: HAL:Driver:FLASH
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configuration:
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nvm_arch_cache: false
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nvm_arch_read_mode: No Miss Penalty
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nvm_arch_sleepprm: Wake On Access
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optional_signals: []
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variant: null
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clocks:
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domain_group: null
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PM:
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user_label: PM
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definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::PM::driver_config_definition::PM::HAL:HPL:PM
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functionality: System
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api: HAL:HPL:PM
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configuration:
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apba_div: '1'
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apbb_div: '1'
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apbc_div: '1'
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cpu_clock_source: Generic clock generator 0
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cpu_div: '1'
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enable_cpu_clock: true
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nvm_wait_states: '0'
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optional_signals: []
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variant: null
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clocks:
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domain_group:
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nodes:
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- name: CPU
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input: CPU
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configuration: {}
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SPI_M_SERCOM0:
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user_label: SPI_M_SERCOM0
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definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::SERCOM0::driver_config_definition::SPI.Master::HAL:Driver:SPI.Master.Sync
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functionality: SPI
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api: HAL:Driver:SPI_Master_Sync
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configuration:
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spi_master_advanced: false
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spi_master_arch_cpha: Sample input on leading edge
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spi_master_arch_cpol: SCK is low when idle
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spi_master_arch_dbgstop: Keep running
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spi_master_arch_dord: MSB first
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spi_master_arch_ibon: In data stream
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spi_master_arch_runstdby: false
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spi_master_baud_rate: 50000
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spi_master_character_size: 8 bits
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spi_master_dummybyte: 511
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spi_master_rx_enable: true
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optional_signals: []
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variant:
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specification: TXPO=0, RXPO=2
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required_signals:
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- name: SERCOM0/PAD/0
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pad: PA04
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label: MOSI
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- name: SERCOM0/PAD/1
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pad: PA05
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label: SCK
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- name: SERCOM0/PAD/2
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pad: PA06
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label: MISO
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clocks:
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domain_group:
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nodes:
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- name: Core
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input: Generic clock generator 0
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- name: Slow
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input: Generic clock generator 3
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configuration:
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core_gclk_selection: Generic clock generator 0
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slow_gclk_selection: Generic clock generator 3
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I2C_M_SYNC_SERCOM1:
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user_label: I2C_M_SYNC_SERCOM1
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definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::SERCOM1::driver_config_definition::I2C.Master.Standard~2FFast-mode::HAL:Driver:I2C.Master.Sync
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functionality: I2C
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api: HAL:Driver:I2C_Master_Sync
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configuration:
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i2c_master_advanced: false
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i2c_master_arch_dbgstop: Keep running
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i2c_master_arch_inactout: Disabled
|
|
i2c_master_arch_lowtout: false
|
|
i2c_master_arch_mexttoen: false
|
|
i2c_master_arch_runstdby: false
|
|
i2c_master_arch_sdahold: 300-600ns hold time
|
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i2c_master_arch_sexttoen: false
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i2c_master_arch_trise: 215
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i2c_master_baud_rate: 100000
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optional_signals: []
|
|
variant:
|
|
specification: SDA=0, SCL=1
|
|
required_signals:
|
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- name: SERCOM1/PAD/0
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pad: PA16
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label: SDA
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- name: SERCOM1/PAD/1
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pad: PA17
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label: SCL
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clocks:
|
|
domain_group:
|
|
nodes:
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- name: Core
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|
input: Generic clock generator 0
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- name: Slow
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input: Generic clock generator 3
|
|
configuration:
|
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core_gclk_selection: Generic clock generator 0
|
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slow_gclk_selection: Generic clock generator 3
|
|
USART_ASYNC_SERCOM2:
|
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user_label: USART_ASYNC_SERCOM2
|
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definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::SERCOM2::driver_config_definition::UART::HAL:Driver:USART.Async
|
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functionality: USART
|
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api: HAL:Driver:USART_Async
|
|
configuration:
|
|
usart_advanced: false
|
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usart_arch_clock_mode: USART with internal clock
|
|
usart_arch_cloden: false
|
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usart_arch_dbgstop: Keep running
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usart_arch_dord: LSB is transmitted first
|
|
usart_arch_enc: No encoding
|
|
usart_arch_fractional: 0
|
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usart_arch_ibon: false
|
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usart_arch_runstdby: false
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usart_arch_sampa: 7-8-9 (3-4-5 8-bit over-sampling)
|
|
usart_arch_sampr: 16x arithmetic
|
|
usart_arch_sfde: false
|
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usart_baud_rate: 9600
|
|
usart_character_size: 8 bits
|
|
usart_parity: No parity
|
|
usart_rx_enable: true
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usart_stop_bit: One stop bit
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usart_tx_enable: true
|
|
optional_signals: []
|
|
variant:
|
|
specification: TXPO=0, RXPO=1, CMODE=0
|
|
required_signals:
|
|
- name: SERCOM2/PAD/0
|
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pad: PA08
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label: TX
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- name: SERCOM2/PAD/1
|
|
pad: PA09
|
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label: RX
|
|
clocks:
|
|
domain_group:
|
|
nodes:
|
|
- name: Core
|
|
input: Generic clock generator 0
|
|
- name: Slow
|
|
input: Generic clock generator 3
|
|
configuration:
|
|
core_gclk_selection: Generic clock generator 0
|
|
slow_gclk_selection: Generic clock generator 3
|
|
SPI_M_DMA_SERCOM3:
|
|
user_label: SPI_M_DMA_SERCOM3
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::SERCOM3::driver_config_definition::SPI.Master::HAL:Driver:SPI.Master.DMA
|
|
functionality: SPI
|
|
api: HAL:Driver:SPI_Master_DMA
|
|
configuration:
|
|
spi_master_advanced: false
|
|
spi_master_arch_cpha: Sample input on leading edge
|
|
spi_master_arch_cpol: SCK is low when idle
|
|
spi_master_arch_dbgstop: Keep running
|
|
spi_master_arch_dord: MSB first
|
|
spi_master_arch_ibon: In data stream
|
|
spi_master_arch_runstdby: false
|
|
spi_master_baud_rate: 50000
|
|
spi_master_character_size: 8 bits
|
|
spi_master_dma_rx_channel: 1
|
|
spi_master_dma_tx_channel: 0
|
|
spi_master_dummybyte: 511
|
|
spi_master_rx_channel: true
|
|
spi_master_rx_enable: true
|
|
optional_signals: []
|
|
variant:
|
|
specification: TXPO=1, RXPO=0
|
|
required_signals:
|
|
- name: SERCOM3/PAD/0
|
|
pad: PA22
|
|
label: MISO
|
|
- name: SERCOM3/PAD/2
|
|
pad: PA20
|
|
label: MOSI
|
|
- name: SERCOM3/PAD/3
|
|
pad: PA19
|
|
label: SCK
|
|
clocks:
|
|
domain_group:
|
|
nodes:
|
|
- name: Core
|
|
input: Generic clock generator 0
|
|
- name: Slow
|
|
input: Generic clock generator 3
|
|
configuration:
|
|
core_gclk_selection: Generic clock generator 0
|
|
slow_gclk_selection: Generic clock generator 3
|
|
DELAY_0:
|
|
user_label: DELAY_0
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::SysTick::driver_config_definition::Delay::HAL:Driver:Delay
|
|
functionality: Delay
|
|
api: HAL:Driver:Delay
|
|
configuration:
|
|
systick_arch_tickint: false
|
|
optional_signals: []
|
|
variant: null
|
|
clocks:
|
|
domain_group: null
|
|
TIMER_0:
|
|
user_label: TIMER_0
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::RTC::driver_config_definition::Timer::HAL:Driver:Timer
|
|
functionality: Timer
|
|
api: HAL:Driver:Timer
|
|
configuration:
|
|
rtc_arch_comp_val: 1024
|
|
rtc_arch_init_reset: true
|
|
rtc_arch_prescaler: Peripheral clock divided by 1
|
|
rtc_cmpeo0: false
|
|
rtc_event_control: false
|
|
rtc_ovfeo: false
|
|
rtc_pereo0: false
|
|
rtc_pereo1: false
|
|
rtc_pereo2: false
|
|
rtc_pereo3: false
|
|
rtc_pereo4: false
|
|
rtc_pereo5: false
|
|
rtc_pereo6: false
|
|
rtc_pereo7: false
|
|
optional_signals: []
|
|
variant: null
|
|
clocks:
|
|
domain_group:
|
|
nodes:
|
|
- name: RTC
|
|
input: Generic clock generator 0
|
|
configuration:
|
|
rtc_clk_selection: Generic clock generator 0
|
|
PWM_0:
|
|
user_label: PWM_0
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::TC3::driver_config_definition::PWM::HAL:Driver:PWM
|
|
functionality: PWM
|
|
api: HAL:Driver:PWM
|
|
configuration:
|
|
tc_arch_dbgrun: false
|
|
tc_arch_evact: Event action disabled
|
|
tc_arch_mceo0: false
|
|
tc_arch_mceo1: false
|
|
tc_arch_mode: Counter in 16-bit mode
|
|
tc_arch_ovfeo: false
|
|
tc_arch_presync: Reload or reset counter on next GCLK
|
|
tc_arch_runstdby: false
|
|
tc_arch_tcei: false
|
|
tc_arch_tceinv: false
|
|
tc_arch_wave_duty_val: 500
|
|
tc_arch_wave_per_val: 1000
|
|
tc_per: 50
|
|
tc_prescaler: Divide by 8
|
|
timer_event_control: false
|
|
optional_signals: []
|
|
variant: null
|
|
clocks:
|
|
domain_group:
|
|
nodes:
|
|
- name: TC
|
|
input: Generic clock generator 0
|
|
configuration:
|
|
tc_gclk_selection: Generic clock generator 0
|
|
DAC_0:
|
|
user_label: DAC_0
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::DAC::driver_config_definition::DAC::HAL:Driver:DAC.Sync
|
|
functionality: DAC
|
|
api: HAL:Driver:DAC_Sync
|
|
configuration:
|
|
dac_advanced_settings: false
|
|
dac_arch_bdwp: false
|
|
dac_arch_emptyeo: false
|
|
dac_arch_eoen: true
|
|
dac_arch_ioen: false
|
|
dac_arch_leftadj: false
|
|
dac_arch_refsel: Internal 1.0v reference
|
|
dac_arch_runstdby: false
|
|
dac_arch_startei: false
|
|
dac_arch_vpd: false
|
|
optional_signals: []
|
|
variant: null
|
|
clocks:
|
|
domain_group:
|
|
nodes:
|
|
- name: DAC
|
|
input: Generic clock generator 0
|
|
configuration:
|
|
dac_gclk_selection: Generic clock generator 0
|
|
DMAC:
|
|
user_label: DMAC
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::DMAC::driver_config_definition::DMAC::HAL:HPL:DMAC
|
|
functionality: System
|
|
api: HAL:HPL:DMAC
|
|
configuration:
|
|
dmac_beatsize_0: 8-bit bus transfer
|
|
dmac_beatsize_1: 8-bit bus transfer
|
|
dmac_beatsize_10: 8-bit bus transfer
|
|
dmac_beatsize_11: 8-bit bus transfer
|
|
dmac_beatsize_12: 8-bit bus transfer
|
|
dmac_beatsize_13: 8-bit bus transfer
|
|
dmac_beatsize_14: 8-bit bus transfer
|
|
dmac_beatsize_15: 8-bit bus transfer
|
|
dmac_beatsize_2: 8-bit bus transfer
|
|
dmac_beatsize_3: 8-bit bus transfer
|
|
dmac_beatsize_4: 8-bit bus transfer
|
|
dmac_beatsize_5: 8-bit bus transfer
|
|
dmac_beatsize_6: 8-bit bus transfer
|
|
dmac_beatsize_7: 8-bit bus transfer
|
|
dmac_beatsize_8: 8-bit bus transfer
|
|
dmac_beatsize_9: 8-bit bus transfer
|
|
dmac_blockact_0: Channel will be disabled if it is the last block transfer in
|
|
the transaction
|
|
dmac_blockact_1: Channel will be disabled if it is the last block transfer in
|
|
the transaction
|
|
dmac_blockact_10: Channel will be disabled if it is the last block transfer
|
|
in the transaction
|
|
dmac_blockact_11: Channel will be disabled if it is the last block transfer
|
|
in the transaction
|
|
dmac_blockact_12: Channel will be disabled if it is the last block transfer
|
|
in the transaction
|
|
dmac_blockact_13: Channel will be disabled if it is the last block transfer
|
|
in the transaction
|
|
dmac_blockact_14: Channel will be disabled if it is the last block transfer
|
|
in the transaction
|
|
dmac_blockact_15: Channel will be disabled if it is the last block transfer
|
|
in the transaction
|
|
dmac_blockact_2: Channel will be disabled if it is the last block transfer in
|
|
the transaction
|
|
dmac_blockact_3: Channel will be disabled if it is the last block transfer in
|
|
the transaction
|
|
dmac_blockact_4: Channel will be disabled if it is the last block transfer in
|
|
the transaction
|
|
dmac_blockact_5: Channel will be disabled if it is the last block transfer in
|
|
the transaction
|
|
dmac_blockact_6: Channel will be disabled if it is the last block transfer in
|
|
the transaction
|
|
dmac_blockact_7: Channel will be disabled if it is the last block transfer in
|
|
the transaction
|
|
dmac_blockact_8: Channel will be disabled if it is the last block transfer in
|
|
the transaction
|
|
dmac_blockact_9: Channel will be disabled if it is the last block transfer in
|
|
the transaction
|
|
dmac_channel_0_settings: false
|
|
dmac_channel_10_settings: false
|
|
dmac_channel_11_settings: false
|
|
dmac_channel_12_settings: false
|
|
dmac_channel_13_settings: false
|
|
dmac_channel_14_settings: false
|
|
dmac_channel_15_settings: false
|
|
dmac_channel_1_settings: false
|
|
dmac_channel_2_settings: false
|
|
dmac_channel_3_settings: false
|
|
dmac_channel_4_settings: false
|
|
dmac_channel_5_settings: false
|
|
dmac_channel_6_settings: false
|
|
dmac_channel_7_settings: false
|
|
dmac_channel_8_settings: false
|
|
dmac_channel_9_settings: false
|
|
dmac_dbgrun: false
|
|
dmac_dstinc_0: false
|
|
dmac_dstinc_1: false
|
|
dmac_dstinc_10: false
|
|
dmac_dstinc_11: false
|
|
dmac_dstinc_12: false
|
|
dmac_dstinc_13: false
|
|
dmac_dstinc_14: false
|
|
dmac_dstinc_15: false
|
|
dmac_dstinc_2: false
|
|
dmac_dstinc_3: false
|
|
dmac_dstinc_4: false
|
|
dmac_dstinc_5: false
|
|
dmac_dstinc_6: false
|
|
dmac_dstinc_7: false
|
|
dmac_dstinc_8: false
|
|
dmac_dstinc_9: false
|
|
dmac_enable: false
|
|
dmac_enable_0: false
|
|
dmac_enable_1: false
|
|
dmac_enable_10: false
|
|
dmac_enable_11: false
|
|
dmac_enable_12: false
|
|
dmac_enable_13: false
|
|
dmac_enable_14: false
|
|
dmac_enable_15: false
|
|
dmac_enable_2: false
|
|
dmac_enable_3: false
|
|
dmac_enable_4: false
|
|
dmac_enable_5: false
|
|
dmac_enable_6: false
|
|
dmac_enable_7: false
|
|
dmac_enable_8: false
|
|
dmac_enable_9: false
|
|
dmac_evact_0: No action
|
|
dmac_evact_1: No action
|
|
dmac_evact_10: No action
|
|
dmac_evact_11: No action
|
|
dmac_evact_12: No action
|
|
dmac_evact_13: No action
|
|
dmac_evact_14: No action
|
|
dmac_evact_15: No action
|
|
dmac_evact_2: No action
|
|
dmac_evact_3: No action
|
|
dmac_evact_4: No action
|
|
dmac_evact_5: No action
|
|
dmac_evact_6: No action
|
|
dmac_evact_7: No action
|
|
dmac_evact_8: No action
|
|
dmac_evact_9: No action
|
|
dmac_evie_0: false
|
|
dmac_evie_1: false
|
|
dmac_evie_10: false
|
|
dmac_evie_11: false
|
|
dmac_evie_12: false
|
|
dmac_evie_13: false
|
|
dmac_evie_14: false
|
|
dmac_evie_15: false
|
|
dmac_evie_2: false
|
|
dmac_evie_3: false
|
|
dmac_evie_4: false
|
|
dmac_evie_5: false
|
|
dmac_evie_6: false
|
|
dmac_evie_7: false
|
|
dmac_evie_8: false
|
|
dmac_evie_9: false
|
|
dmac_evoe_0: false
|
|
dmac_evoe_1: false
|
|
dmac_evoe_10: false
|
|
dmac_evoe_11: false
|
|
dmac_evoe_12: false
|
|
dmac_evoe_13: false
|
|
dmac_evoe_14: false
|
|
dmac_evoe_15: false
|
|
dmac_evoe_2: false
|
|
dmac_evoe_3: false
|
|
dmac_evoe_4: false
|
|
dmac_evoe_5: false
|
|
dmac_evoe_6: false
|
|
dmac_evoe_7: false
|
|
dmac_evoe_8: false
|
|
dmac_evoe_9: false
|
|
dmac_evosel_0: Event generation disabled
|
|
dmac_evosel_1: Event generation disabled
|
|
dmac_evosel_10: Event generation disabled
|
|
dmac_evosel_11: Event generation disabled
|
|
dmac_evosel_12: Event generation disabled
|
|
dmac_evosel_13: Event generation disabled
|
|
dmac_evosel_14: Event generation disabled
|
|
dmac_evosel_15: Event generation disabled
|
|
dmac_evosel_2: Event generation disabled
|
|
dmac_evosel_3: Event generation disabled
|
|
dmac_evosel_4: Event generation disabled
|
|
dmac_evosel_5: Event generation disabled
|
|
dmac_evosel_6: Event generation disabled
|
|
dmac_evosel_7: Event generation disabled
|
|
dmac_evosel_8: Event generation disabled
|
|
dmac_evosel_9: Event generation disabled
|
|
dmac_lvl_0: Channel priority 0
|
|
dmac_lvl_1: Channel priority 0
|
|
dmac_lvl_10: Channel priority 0
|
|
dmac_lvl_11: Channel priority 0
|
|
dmac_lvl_12: Channel priority 0
|
|
dmac_lvl_13: Channel priority 0
|
|
dmac_lvl_14: Channel priority 0
|
|
dmac_lvl_15: Channel priority 0
|
|
dmac_lvl_2: Channel priority 0
|
|
dmac_lvl_3: Channel priority 0
|
|
dmac_lvl_4: Channel priority 0
|
|
dmac_lvl_5: Channel priority 0
|
|
dmac_lvl_6: Channel priority 0
|
|
dmac_lvl_7: Channel priority 0
|
|
dmac_lvl_8: Channel priority 0
|
|
dmac_lvl_9: Channel priority 0
|
|
dmac_lvlen0: false
|
|
dmac_lvlen1: false
|
|
dmac_lvlen2: false
|
|
dmac_lvlen3: false
|
|
dmac_lvlpri0: 0
|
|
dmac_lvlpri1: 0
|
|
dmac_lvlpri2: 0
|
|
dmac_lvlpri3: 0
|
|
dmac_rrlvlen0: Static arbitration scheme for channel with priority 0
|
|
dmac_rrlvlen1: Static arbitration scheme for channel with priority 1
|
|
dmac_rrlvlen2: Static arbitration scheme for channel with priority 2
|
|
dmac_rrlvlen3: Static arbitration scheme for channel with priority 3
|
|
dmac_srcinc_0: false
|
|
dmac_srcinc_1: false
|
|
dmac_srcinc_10: false
|
|
dmac_srcinc_11: false
|
|
dmac_srcinc_12: false
|
|
dmac_srcinc_13: false
|
|
dmac_srcinc_14: false
|
|
dmac_srcinc_15: false
|
|
dmac_srcinc_2: false
|
|
dmac_srcinc_3: false
|
|
dmac_srcinc_4: false
|
|
dmac_srcinc_5: false
|
|
dmac_srcinc_6: false
|
|
dmac_srcinc_7: false
|
|
dmac_srcinc_8: false
|
|
dmac_srcinc_9: false
|
|
dmac_stepsel_0: Step size settings apply to the destination address
|
|
dmac_stepsel_1: Step size settings apply to the destination address
|
|
dmac_stepsel_10: Step size settings apply to the destination address
|
|
dmac_stepsel_11: Step size settings apply to the destination address
|
|
dmac_stepsel_12: Step size settings apply to the destination address
|
|
dmac_stepsel_13: Step size settings apply to the destination address
|
|
dmac_stepsel_14: Step size settings apply to the destination address
|
|
dmac_stepsel_15: Step size settings apply to the destination address
|
|
dmac_stepsel_2: Step size settings apply to the destination address
|
|
dmac_stepsel_3: Step size settings apply to the destination address
|
|
dmac_stepsel_4: Step size settings apply to the destination address
|
|
dmac_stepsel_5: Step size settings apply to the destination address
|
|
dmac_stepsel_6: Step size settings apply to the destination address
|
|
dmac_stepsel_7: Step size settings apply to the destination address
|
|
dmac_stepsel_8: Step size settings apply to the destination address
|
|
dmac_stepsel_9: Step size settings apply to the destination address
|
|
dmac_stepsize_0: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_1: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_10: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_11: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_12: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_13: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_14: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_15: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_2: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_3: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_4: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_5: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_6: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_7: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_8: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_stepsize_9: Next ADDR = ADDR + (BEATSIZE + 1) * 1
|
|
dmac_trifsrc_0: Only software/event triggers
|
|
dmac_trifsrc_1: Only software/event triggers
|
|
dmac_trifsrc_10: Only software/event triggers
|
|
dmac_trifsrc_11: Only software/event triggers
|
|
dmac_trifsrc_12: Only software/event triggers
|
|
dmac_trifsrc_13: Only software/event triggers
|
|
dmac_trifsrc_14: Only software/event triggers
|
|
dmac_trifsrc_15: Only software/event triggers
|
|
dmac_trifsrc_2: Only software/event triggers
|
|
dmac_trifsrc_3: Only software/event triggers
|
|
dmac_trifsrc_4: Only software/event triggers
|
|
dmac_trifsrc_5: Only software/event triggers
|
|
dmac_trifsrc_6: Only software/event triggers
|
|
dmac_trifsrc_7: Only software/event triggers
|
|
dmac_trifsrc_8: Only software/event triggers
|
|
dmac_trifsrc_9: Only software/event triggers
|
|
dmac_trigact_0: One trigger required for each block transfer
|
|
dmac_trigact_1: One trigger required for each block transfer
|
|
dmac_trigact_10: One trigger required for each block transfer
|
|
dmac_trigact_11: One trigger required for each block transfer
|
|
dmac_trigact_12: One trigger required for each block transfer
|
|
dmac_trigact_13: One trigger required for each block transfer
|
|
dmac_trigact_14: One trigger required for each block transfer
|
|
dmac_trigact_15: One trigger required for each block transfer
|
|
dmac_trigact_2: One trigger required for each block transfer
|
|
dmac_trigact_3: One trigger required for each block transfer
|
|
dmac_trigact_4: One trigger required for each block transfer
|
|
dmac_trigact_5: One trigger required for each block transfer
|
|
dmac_trigact_6: One trigger required for each block transfer
|
|
dmac_trigact_7: One trigger required for each block transfer
|
|
dmac_trigact_8: One trigger required for each block transfer
|
|
dmac_trigact_9: One trigger required for each block transfer
|
|
optional_signals: []
|
|
variant: null
|
|
clocks:
|
|
domain_group: null
|
|
SYSCTRL:
|
|
user_label: SYSCTRL
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::SYSCTRL::driver_config_definition::SYSCTRL::HAL:HPL:SYSCTRL
|
|
functionality: System
|
|
api: HAL:HPL:SYSCTRL
|
|
configuration:
|
|
dfll48m_arch_bplckc: false
|
|
dfll48m_arch_calibration: true
|
|
dfll48m_arch_ccdis: true
|
|
dfll48m_arch_coarse: 10
|
|
dfll48m_arch_enable: true
|
|
dfll48m_arch_fine: 512
|
|
dfll48m_arch_llaw: false
|
|
dfll48m_arch_ondemand: true
|
|
dfll48m_arch_qldis: false
|
|
dfll48m_arch_runstdby: false
|
|
dfll48m_arch_stable: false
|
|
dfll48m_arch_usbcrm: true
|
|
dfll48m_arch_waitlock: false
|
|
dfll48m_mode: Closed Loop Mode
|
|
dfll48m_mul: 48000
|
|
dfll48m_ref_clock: Generic clock generator 4
|
|
dfll_arch_cstep: 1
|
|
dfll_arch_fstep: 1
|
|
enable_dfll48m: true
|
|
enable_fdpll96m: false
|
|
enable_osc32k: false
|
|
enable_osc8m: true
|
|
enable_osculp32k: true
|
|
enable_xosc: false
|
|
enable_xosc32k: false
|
|
fdpll96m_arch_enable: false
|
|
fdpll96m_arch_lbypass: false
|
|
fdpll96m_arch_ondemand: true
|
|
fdpll96m_arch_runstdby: false
|
|
fdpll96m_clock_div: 0
|
|
fdpll96m_ldr: 1463
|
|
fdpll96m_ldrfrac: 13
|
|
fdpll96m_ref_clock: Generic clock generator 3
|
|
osc32k_arch_calib: 0
|
|
osc32k_arch_en1k: false
|
|
osc32k_arch_en32k: false
|
|
osc32k_arch_enable: false
|
|
osc32k_arch_ondemand: true
|
|
osc32k_arch_overwrite_calibration: false
|
|
osc32k_arch_runstdby: false
|
|
osc32k_arch_startup: 3 Clock Cycles (92us)
|
|
osc32k_arch_wrtlock: false
|
|
osc8m_arch_calib: 0
|
|
osc8m_arch_enable: true
|
|
osc8m_arch_ondemand: true
|
|
osc8m_arch_overwrite_calibration: false
|
|
osc8m_arch_runstdby: false
|
|
osc8m_presc: '8'
|
|
osculp32k_arch_calib: 0
|
|
osculp32k_arch_overwrite_calibration: false
|
|
osculp32k_arch_wrtlock: false
|
|
xosc32k_arch_aampen: false
|
|
xosc32k_arch_en1k: false
|
|
xosc32k_arch_en32k: false
|
|
xosc32k_arch_enable: false
|
|
xosc32k_arch_ondemand: true
|
|
xosc32k_arch_runstdby: false
|
|
xosc32k_arch_startup: 122 us
|
|
xosc32k_arch_wrtlock: false
|
|
xosc32k_arch_xtalen: false
|
|
xosc_arch_ampgc: false
|
|
xosc_arch_enable: false
|
|
xosc_arch_gain: 2Mhz
|
|
xosc_arch_ondemand: true
|
|
xosc_arch_runstdby: false
|
|
xosc_arch_startup: 31 us
|
|
xosc_arch_xtalen: false
|
|
xosc_frequency: 400000
|
|
optional_signals: []
|
|
variant: null
|
|
clocks:
|
|
domain_group: null
|
|
USB_0:
|
|
user_label: USB_0
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::USB::driver_config_definition::USB.Device::HAL:Driver:USB.Device
|
|
functionality: USB
|
|
api: HAL:Driver:USB_Device
|
|
configuration:
|
|
usb_arch_ep0_cache: Cached by 64 bytes buffer
|
|
usb_arch_ep1_cache: Cached by 64 bytes buffer
|
|
usb_arch_ep2_cache: Cached by 64 bytes buffer
|
|
usb_arch_ep3_cache: Cached by 64 bytes buffer
|
|
usb_arch_ep4_cache: Cached by 64 bytes buffer
|
|
usb_arch_ep5_cache: Cached by 64 bytes buffer
|
|
usb_arch_ep6_cache: Cached by 64 bytes buffer
|
|
usb_arch_ep7_cache: Cached by 64 bytes buffer
|
|
usb_ep1_I_CACHE: No cache
|
|
usb_ep2_I_CACHE: No cache
|
|
usb_ep3_I_CACHE: No cache
|
|
usb_ep4_I_CACHE: No cache
|
|
usb_ep5_I_CACHE: No cache
|
|
usb_ep6_I_CACHE: No cache
|
|
usb_ep7_I_CACHE: No cache
|
|
usbd_arch_max_ep_n: 2 (EP 0x82 or 0x02)
|
|
usbd_arch_speed: Full speed
|
|
usbd_num_ep_sp: 4 (EP0 + 3 endpoints)
|
|
optional_signals: []
|
|
variant:
|
|
specification: default
|
|
required_signals:
|
|
- name: USB/DM
|
|
pad: PA24
|
|
label: Data-
|
|
- name: USB/DP
|
|
pad: PA25
|
|
label: Data+
|
|
clocks:
|
|
domain_group:
|
|
nodes:
|
|
- name: USB
|
|
input: Generic clock generator 0
|
|
configuration:
|
|
usb_gclk_selection: Generic clock generator 0
|
|
pads:
|
|
PA02:
|
|
name: PA02
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA02
|
|
mode: Digital input
|
|
user_label: PA02
|
|
configuration: null
|
|
PA03:
|
|
name: PA03
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA03
|
|
mode: Digital input
|
|
user_label: PA03
|
|
configuration: null
|
|
PB08:
|
|
name: PB08
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PB08
|
|
mode: Digital input
|
|
user_label: PB08
|
|
configuration: null
|
|
PB09:
|
|
name: PB09
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PB09
|
|
mode: Digital input
|
|
user_label: PB09
|
|
configuration: null
|
|
PA04:
|
|
name: PA04
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA04
|
|
mode: Digital output
|
|
user_label: PA04
|
|
configuration: null
|
|
PA05:
|
|
name: PA05
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA05
|
|
mode: Digital output
|
|
user_label: PA05
|
|
configuration: null
|
|
PA06:
|
|
name: PA06
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA06
|
|
mode: Digital input
|
|
user_label: PA06
|
|
configuration: null
|
|
PA07:
|
|
name: PA07
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA07
|
|
mode: Digital input
|
|
user_label: PA07
|
|
configuration: null
|
|
PA08:
|
|
name: PA08
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA08
|
|
mode: Peripheral IO
|
|
user_label: PA08
|
|
configuration: null
|
|
PA09:
|
|
name: PA09
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA09
|
|
mode: Peripheral IO
|
|
user_label: PA09
|
|
configuration: null
|
|
PA10:
|
|
name: PA10
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA10
|
|
mode: Digital input
|
|
user_label: PA10
|
|
configuration: null
|
|
PA11:
|
|
name: PA11
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA11
|
|
mode: Digital input
|
|
user_label: PA11
|
|
configuration: null
|
|
PA13:
|
|
name: PA13
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA13
|
|
mode: Digital input
|
|
user_label: PA13
|
|
configuration: null
|
|
PA14:
|
|
name: PA14
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA14
|
|
mode: Digital input
|
|
user_label: PA14
|
|
configuration: null
|
|
PA15:
|
|
name: PA15
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA15
|
|
mode: Digital input
|
|
user_label: PA15
|
|
configuration: null
|
|
PA16:
|
|
name: PA16
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA16
|
|
mode: I2C
|
|
user_label: PA16
|
|
configuration: null
|
|
PA17:
|
|
name: PA17
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA17
|
|
mode: I2C
|
|
user_label: PA17
|
|
configuration: null
|
|
PA18:
|
|
name: PA18
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA18
|
|
mode: Digital input
|
|
user_label: PA18
|
|
configuration: null
|
|
PA19:
|
|
name: PA19
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA19
|
|
mode: Digital output
|
|
user_label: PA19
|
|
configuration: null
|
|
PA20:
|
|
name: PA20
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA20
|
|
mode: Digital output
|
|
user_label: PA20
|
|
configuration: null
|
|
PA22:
|
|
name: PA22
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA22
|
|
mode: Digital input
|
|
user_label: PA22
|
|
configuration: null
|
|
PA23:
|
|
name: PA23
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA23
|
|
mode: Digital input
|
|
user_label: PA23
|
|
configuration: null
|
|
PA24:
|
|
name: PA24
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA24
|
|
mode: Advanced
|
|
user_label: PA24
|
|
configuration: null
|
|
PA25:
|
|
name: PA25
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA25
|
|
mode: Advanced
|
|
user_label: PA25
|
|
configuration: null
|
|
PB22:
|
|
name: PB22
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PB22
|
|
mode: Digital input
|
|
user_label: PB22
|
|
configuration: null
|
|
PB23:
|
|
name: PB23
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PB23
|
|
mode: Digital input
|
|
user_label: PB23
|
|
configuration: null
|
|
PA27:
|
|
name: PA27
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA27
|
|
mode: Digital input
|
|
user_label: PA27
|
|
configuration: null
|
|
PA28:
|
|
name: PA28
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA28
|
|
mode: Digital input
|
|
user_label: PA28
|
|
configuration: null
|
|
PA30:
|
|
name: PA30
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA30
|
|
mode: Digital input
|
|
user_label: PA30
|
|
configuration: null
|
|
PA31:
|
|
name: PA31
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PA31
|
|
mode: Digital input
|
|
user_label: PA31
|
|
configuration: null
|
|
PB02:
|
|
name: PB02
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PB02
|
|
mode: Digital input
|
|
user_label: PB02
|
|
configuration: null
|
|
PB03:
|
|
name: PB03
|
|
definition: Atmel:SAMD21_Drivers:0.0.1::SAMD21G18A-MF::pad::PB03
|
|
mode: Digital input
|
|
user_label: PB03
|
|
configuration: null
|
|
toolchain_options: []
|
|
|