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291 lines
16 KiB
291 lines
16 KiB
/**
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* \file
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*
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* \brief Generic Clock Controller v210 related functionality.
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*
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* Copyright (C) 2014 - 2017 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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#include <hpl_gclk_config.h>
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#include <hpl_init.h>
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#include <utils_assert.h>
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/**
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* \brief Initializes generators
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*/
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void _gclk_init_generators(void)
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{
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#if CONF_GCLK_GEN_0_GENEN == 1
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_0_DIV) | GCLK_GENDIV_ID(0));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_0_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_0_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_0_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_0_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_0_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_0_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_0_SRC
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| GCLK_GENCTRL_ID(0));
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#endif
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#if CONF_GCLK_GEN_1_GENEN == 1
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_1_DIV) | GCLK_GENDIV_ID(1));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_1_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_1_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_1_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_1_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_1_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_1_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_1_SRC
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| GCLK_GENCTRL_ID(1));
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#endif
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#if CONF_GCLK_GEN_2_GENEN == 1
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_2_DIV) | GCLK_GENDIV_ID(2));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_2_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_2_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_2_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_2_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_2_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_2_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_2_SRC
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| GCLK_GENCTRL_ID(2));
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#endif
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#if CONF_GCLK_GEN_3_GENEN == 1
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_3_DIV) | GCLK_GENDIV_ID(3));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_3_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_3_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_3_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_3_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_3_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_3_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_3_SRC
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| GCLK_GENCTRL_ID(3));
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#endif
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#if CONF_GCLK_GEN_4_GENEN == 1
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_4_DIV) | GCLK_GENDIV_ID(4));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_4_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_4_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_4_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_4_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_4_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_4_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_4_SRC
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| GCLK_GENCTRL_ID(4));
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#endif
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#if CONF_GCLK_GEN_5_GENEN == 1
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_5_DIV) | GCLK_GENDIV_ID(5));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_5_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_5_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_5_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_5_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_5_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_5_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_5_SRC
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| GCLK_GENCTRL_ID(5));
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#endif
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#if CONF_GCLK_GEN_6_GENEN == 1
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_6_DIV) | GCLK_GENDIV_ID(6));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_6_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_6_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_6_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_6_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_6_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_6_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_6_SRC
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| GCLK_GENCTRL_ID(6));
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#endif
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#if CONF_GCLK_GEN_7_GENEN == 1
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_7_DIV) | GCLK_GENDIV_ID(7));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_7_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_7_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_7_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_7_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_7_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_7_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_7_SRC
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| GCLK_GENCTRL_ID(7));
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#endif
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#if CONF_GCLK_GEN_8_GENEN == 1
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_8_DIV) | GCLK_GENDIV_ID(8));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_8_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_8_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_8_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_8_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_8_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_8_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_8_SRC
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| GCLK_GENCTRL_ID(8));
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#endif
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}
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void _gclk_init_generators_by_fref(uint32_t bm)
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{
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#if CONF_GCLK_GEN_0_GENEN == 1
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if (bm & (1ul << 0)) {
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_0_DIV) | GCLK_GENDIV_ID(0));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_0_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_0_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_0_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_0_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_0_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_0_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_0_SRC
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| GCLK_GENCTRL_ID(0));
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}
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#endif
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#if CONF_GCLK_GEN_1_GENEN == 1
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if (bm & (1ul << 1)) {
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_1_DIV) | GCLK_GENDIV_ID(1));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_1_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_1_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_1_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_1_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_1_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_1_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_1_SRC
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| GCLK_GENCTRL_ID(1));
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}
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#endif
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#if CONF_GCLK_GEN_2_GENEN == 1
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if (bm & (1ul << 2)) {
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_2_DIV) | GCLK_GENDIV_ID(2));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_2_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_2_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_2_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_2_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_2_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_2_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_2_SRC
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| GCLK_GENCTRL_ID(2));
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}
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#endif
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#if CONF_GCLK_GEN_3_GENEN == 1
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if (bm & (1ul << 3)) {
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_3_DIV) | GCLK_GENDIV_ID(3));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_3_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_3_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_3_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_3_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_3_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_3_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_3_SRC
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| GCLK_GENCTRL_ID(3));
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}
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#endif
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#if CONF_GCLK_GEN_4_GENEN == 1
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if (bm & (1ul << 4)) {
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_4_DIV) | GCLK_GENDIV_ID(4));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_4_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_4_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_4_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_4_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_4_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_4_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_4_SRC
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| GCLK_GENCTRL_ID(4));
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}
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#endif
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#if CONF_GCLK_GEN_5_GENEN == 1
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if (bm & (1ul << 5)) {
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_5_DIV) | GCLK_GENDIV_ID(5));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_5_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_5_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_5_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_5_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_5_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_5_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_5_SRC
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| GCLK_GENCTRL_ID(5));
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}
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#endif
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#if CONF_GCLK_GEN_6_GENEN == 1
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if (bm & (1ul << 6)) {
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_6_DIV) | GCLK_GENDIV_ID(6));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_6_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_6_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_6_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_6_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_6_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_6_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_6_SRC
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| GCLK_GENCTRL_ID(6));
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}
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#endif
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#if CONF_GCLK_GEN_7_GENEN == 1
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if (bm & (1ul << 7)) {
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_7_DIV) | GCLK_GENDIV_ID(7));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_7_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_7_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_7_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_7_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_7_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_7_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_7_SRC
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| GCLK_GENCTRL_ID(7));
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}
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#endif
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#if CONF_GCLK_GEN_8_GENEN == 1
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if (bm & (1ul << 8)) {
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hri_gclk_write_GENDIV_reg(GCLK, GCLK_GENDIV_DIV(CONF_GCLK_GEN_8_DIV) | GCLK_GENDIV_ID(8));
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hri_gclk_write_GENCTRL_reg(GCLK,
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(CONF_GCLK_GEN_8_RUNSTDBY << GCLK_GENCTRL_RUNSTDBY_Pos)
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| (CONF_GCLK_GEN_8_DIVSEL << GCLK_GENCTRL_DIVSEL_Pos)
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| (CONF_GCLK_GEN_8_OE << GCLK_GENCTRL_OE_Pos)
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| (CONF_GCLK_GEN_8_OOV << GCLK_GENCTRL_OOV_Pos)
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| (CONF_GCLK_GEN_8_IDC << GCLK_GENCTRL_IDC_Pos)
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| (CONF_GCLK_GEN_8_GENEN << GCLK_GENCTRL_GENEN_Pos)
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| CONF_GCLK_GEN_8_SRC
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| GCLK_GENCTRL_ID(8));
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}
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#endif
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}
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