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265 lines
9.6 KiB
265 lines
9.6 KiB
/**
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* \file
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*
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* \brief SAM System Controller.
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*
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* Copyright (C) 2015 - 2016 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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#include <hpl_init.h>
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#include <hpl_sysctrl_config.h>
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#include <utils_assert.h>
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/**
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* \brief Initializes clock generators
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*
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* All GCLK generators are running when this function returns.
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*/
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void _sysctrl_init_sources(void)
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{
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void * hw = (void *)SYSCTRL;
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uint16_t calib;
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#if CONF_XOSC32K_CONFIG == 1
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hri_sysctrl_write_XOSC32K_reg(hw,
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(CONF_XOSC32K_WRTLOCK << SYSCTRL_XOSC32K_WRTLOCK_Pos)
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| SYSCTRL_XOSC32K_STARTUP(CONF_XOSC32K_STARTUP)
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| (CONF_XOSC32K_RUNSTDBY << SYSCTRL_XOSC32K_RUNSTDBY_Pos)
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| (CONF_XOSC32K_AAMPEN << SYSCTRL_XOSC32K_AAMPEN_Pos)
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| (CONF_XOSC32K_EN1K << SYSCTRL_XOSC32K_EN1K_Pos)
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| (CONF_XOSC32K_EN32K << SYSCTRL_XOSC32K_EN32K_Pos)
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| (CONF_XOSC32K_XTALEN << SYSCTRL_XOSC32K_XTALEN_Pos)
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| (CONF_XOSC32K_ENABLE << SYSCTRL_XOSC32K_ENABLE_Pos));
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#endif
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#if CONF_XOSC_CONFIG == 1
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hri_sysctrl_write_XOSC_reg(hw,
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SYSCTRL_XOSC_STARTUP(CONF_XOSC_STARTUP) | (CONF_XOSC_AMPGC << SYSCTRL_XOSC_AMPGC_Pos)
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| SYSCTRL_XOSC_GAIN(CONF_XOSC_GAIN)
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| (CONF_XOSC_RUNSTDBY << SYSCTRL_XOSC_RUNSTDBY_Pos)
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| (CONF_XOSC_XTALEN << SYSCTRL_XOSC_XTALEN_Pos)
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| (CONF_XOSC_ENABLE << SYSCTRL_XOSC_ENABLE_Pos));
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#endif
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#if CONF_OSC8M_CONFIG == 1
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calib = hri_sysctrl_read_OSC8M_CALIB_bf(hw);
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hri_sysctrl_write_OSC8M_reg(hw,
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SYSCTRL_OSC8M_FRANGE(hri_sysctrl_read_OSC8M_FRANGE_bf(hw)) |
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#if CONF_OSC8M_OVERWRITE_CALIBRATION == 1
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SYSCTRL_OSC8M_CALIB(CONF_OSC8M_CALIB) |
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#else
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SYSCTRL_OSC8M_CALIB(calib) |
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#endif
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SYSCTRL_OSC8M_PRESC(CONF_OSC8M_PRESC)
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| (CONF_OSC8M_RUNSTDBY << SYSCTRL_OSC8M_RUNSTDBY_Pos)
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| (CONF_OSC8M_ENABLE << SYSCTRL_OSC8M_ENABLE_Pos));
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#endif
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#if CONF_OSC32K_CONFIG == 1
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/* OSC32K calibration value at bit 44:38 of memory 0x00806020 */
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calib = (*((uint32_t *)0x00806024) & 0x0001FC0) >> 6;
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hri_sysctrl_write_OSC32K_reg(hw,
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#if CONF_OSC32K_OVERWRITE_CALIBRATION == 1
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SYSCTRL_OSC32K_CALIB(CONF_OSC32K_CALIB) |
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#else
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SYSCTRL_OSC32K_CALIB(calib) |
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#endif
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(CONF_OSC32K_WRTLOCK << SYSCTRL_OSC32K_WRTLOCK_Pos)
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| SYSCTRL_OSC32K_STARTUP(CONF_OSC32K_STARTUP)
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| (CONF_OSC32K_RUNSTDBY << SYSCTRL_OSC32K_RUNSTDBY_Pos)
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| (CONF_OSC32K_EN1K << SYSCTRL_OSC32K_EN1K_Pos)
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| (CONF_OSC32K_EN32K << SYSCTRL_OSC32K_EN32K_Pos)
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| (1 << SYSCTRL_OSC32K_ENABLE_Pos));
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#else
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/* Enable OSC32K anyway since GCLK configuration may need it to sync */
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hri_sysctrl_set_OSC32K_ENABLE_bit(hw);
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#endif
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#if CONF_OSCULP32K_CONFIG == 1
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hri_sysctrl_write_OSCULP32K_reg(hw,
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#if OSC32K_OVERWRITE_CALIBRATION == 1
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SYSCTRL_OSCULP32K_CALIB(CONF_OSCULP32K_CALIB) |
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#else
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SYSCTRL_OSCULP32K_CALIB(calib) |
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#endif
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(CONF_OSC32K_WRTLOCK << SYSCTRL_OSCULP32K_WRTLOCK_Pos));
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#endif
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#if CONF_XOSC32K_CONFIG == 1
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#if CONF_XOSC32K_ENABLE == 1
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while (!hri_sysctrl_get_PCLKSR_XOSC32KRDY_bit(hw))
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;
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#endif
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#if CONF_XOSC32K_ONDEMAND == 1
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hri_sysctrl_set_XOSC32K_ONDEMAND_bit(hw);
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#endif
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#endif
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#if CONF_XOSC_CONFIG == 1
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#if CONF_XOSC_ENABLE == 1
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while (!hri_sysctrl_get_PCLKSR_XOSCRDY_bit(hw))
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;
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#endif
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#if CONF_XOSC_ONDEMAND == 1
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hri_sysctrl_set_XOSC_ONDEMAND_bit(hw);
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#endif
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#endif
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#if CONF_OSC32K_CONFIG == 1
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#if CONF_OSC32K_ENABLE == 1
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while (!hri_sysctrl_get_PCLKSR_OSC32KRDY_bit(hw))
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;
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#endif
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#if CONF_OSC32K_ONDEMAND == 1
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hri_sysctrl_set_OSC32K_ONDEMAND_bit(hw);
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#endif
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#endif
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#if CONF_OSC8M_CONFIG == 1
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#if CONF_OSC8M_ENABLE == 1
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while (!hri_sysctrl_get_PCLKSR_OSC8MRDY_bit(hw))
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;
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#endif
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#if CONF_OSC8M_ONDEMAND == 1
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hri_sysctrl_set_OSC8M_ONDEMAND_bit(hw);
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#endif
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#endif
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(void)calib, (void)hw;
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}
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void _sysctrl_init_referenced_generators(void)
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{
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void *hw = (void *)SYSCTRL;
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#if CONF_DFLL_CONFIG == 1
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#if CONF_DFLL_USBCRM != 1 && CONF_DFLL_MODE != CONF_DFLL_OPEN_LOOP_MODE
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hri_gclk_write_CLKCTRL_reg(GCLK,
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GCLK_CLKCTRL_ID(0) | GCLK_CLKCTRL_GEN(CONF_DFLL_GCLK) | (1 << GCLK_CLKCTRL_CLKEN_Pos));
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#endif
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hri_sysctrl_write_DFLLCTRL_reg(hw, SYSCTRL_DFLLCTRL_ENABLE);
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while (!hri_sysctrl_get_PCLKSR_DFLLRDY_bit(hw))
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;
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hri_sysctrl_write_DFLLMUL_reg(hw,
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SYSCTRL_DFLLMUL_CSTEP(CONF_DFLL_CSTEP) | SYSCTRL_DFLLMUL_FSTEP(CONF_DFLL_FSTEP)
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| SYSCTRL_DFLLMUL_MUL(CONF_DFLL_MUL));
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hri_sysctrl_write_DFLLVAL_reg(hw, CONF_DFLLVAL);
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hri_sysctrl_dfllctrl_reg_t tmp =
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(CONF_DFLL_WAITLOCK << SYSCTRL_DFLLCTRL_WAITLOCK_Pos) | (CONF_DFLL_BPLCKC << SYSCTRL_DFLLCTRL_BPLCKC_Pos)
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| (CONF_DFLL_QLDIS << SYSCTRL_DFLLCTRL_QLDIS_Pos) | (CONF_DFLL_CCDIS << SYSCTRL_DFLLCTRL_CCDIS_Pos)
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| (CONF_DFLL_RUNSTDBY << SYSCTRL_DFLLCTRL_RUNSTDBY_Pos) | (CONF_DFLL_USBCRM << SYSCTRL_DFLLCTRL_USBCRM_Pos)
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| (CONF_DFLL_LLAW << SYSCTRL_DFLLCTRL_LLAW_Pos) | (CONF_DFLL_STABLE << SYSCTRL_DFLLCTRL_STABLE_Pos)
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| (CONF_DFLL_MODE << SYSCTRL_DFLLCTRL_MODE_Pos) | (CONF_DFLL_ENABLE << SYSCTRL_DFLLCTRL_ENABLE_Pos);
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hri_sysctrl_write_DFLLCTRL_reg(hw, tmp);
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#endif
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#if CONF_DPLL_CONFIG == 1
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#if CONF_DPLL_REFCLK == SYSCTRL_DPLLCTRLB_REFCLK_GCLK_Val
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hri_gclk_write_CLKCTRL_reg(GCLK,
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GCLK_CLKCTRL_ID(1) | GCLK_CLKCTRL_GEN(CONF_DPLL_GCLK) | (1 << GCLK_CLKCTRL_CLKEN_Pos));
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#endif
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hri_sysctrl_write_DPLLCTRLA_reg(hw,
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(CONF_DPLL_RUNSTDBY << SYSCTRL_DPLLCTRLA_RUNSTDBY_Pos)
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| (CONF_DPLL_ENABLE << SYSCTRL_DPLLCTRLA_ENABLE_Pos));
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hri_sysctrl_write_DPLLRATIO_reg(
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hw, SYSCTRL_DPLLRATIO_LDRFRAC(CONF_DPLL_LDRFRAC) | SYSCTRL_DPLLRATIO_LDR(CONF_DPLL_LDR));
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hri_sysctrl_write_DPLLCTRLB_reg(hw,
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SYSCTRL_DPLLCTRLB_DIV(CONF_DPLL_DIV)
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| (CONF_DPLL_LBYPASS << SYSCTRL_DPLLCTRLB_LBYPASS_Pos)
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| SYSCTRL_DPLLCTRLB_LTIME(CONF_DPLL_LTIME)
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| SYSCTRL_DPLLCTRLB_REFCLK(CONF_DPLL_REFCLK)
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| (CONF_DPLL_WUF << SYSCTRL_DPLLCTRLB_WUF_Pos)
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| (CONF_DPLL_LPEN << SYSCTRL_DPLLCTRLB_LPEN_Pos)
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| SYSCTRL_DPLLCTRLB_FILTER(CONF_DPLL_FILTER));
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#endif
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#if CONF_DFLL_CONFIG == 1
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#if CONF_DFLL_ENABLE == 1
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if (hri_sysctrl_get_DFLLCTRL_MODE_bit(hw)) {
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#if CONF_DFLL_USBCRM == 0
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hri_sysctrl_pclksr_reg_t status_mask
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= SYSCTRL_PCLKSR_DFLLRDY | SYSCTRL_PCLKSR_DFLLLCKF | SYSCTRL_PCLKSR_DFLLLCKC;
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#else
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hri_sysctrl_pclksr_reg_t status_mask = SYSCTRL_PCLKSR_DFLLRDY;
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#endif
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while (hri_sysctrl_get_PCLKSR_reg(hw, status_mask) != status_mask)
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;
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} else {
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while (!hri_sysctrl_get_PCLKSR_DFLLRDY_bit(hw))
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;
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}
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#endif
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#if CONF_DFLL_ONDEMAND == 1
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hri_sysctrl_set_DFLLCTRL_ONDEMAND_bit(hw);
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#endif
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#endif
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#if CONF_DPLL_CONFIG == 1
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#if CONF_DPLL_ENABLE == 1
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while (!(hri_sysctrl_get_DPLLSTATUS_ENABLE_bit(hw) || hri_sysctrl_get_DPLLSTATUS_LOCK_bit(hw)
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|| hri_sysctrl_get_DPLLSTATUS_CLKRDY_bit(hw)))
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;
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#endif
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#if CONF_DPLL_ONDEMAND == 1
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hri_sysctrl_set_DPLLCTRLA_ONDEMAND_bit(hw);
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#endif
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#endif
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#if CONF_DFLL_CONFIG == 1
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while (hri_gclk_get_STATUS_SYNCBUSY_bit(GCLK))
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;
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#endif
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#if CONF_OSC32K_CONFIG == 0 || CONF_OSC32K_ENABLE == 0
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/* Disable after all possible configurations needs sync written. */
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hri_sysctrl_clear_OSC32K_ENABLE_bit(hw);
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#endif
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(void)hw;
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}
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