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93 lines
3.0 KiB
93 lines
3.0 KiB
/**
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* \file
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*
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* \brief Generic RAMECC related functionality.
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*
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* Copyright (C) 2016 -2107 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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#include <utils.h>
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#include <utils_assert.h>
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#include <hpl_ramecc.h>
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/* RAMECC device descriptor */
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struct _ramecc_device device;
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/**
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* \brief Initialize RAMECC
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*/
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int32_t _ramecc_init(void)
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{
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if (hri_ramecc_get_STATUS_ECCDIS_bit(RAMECC)) {
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return ERR_ABORTED;
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}
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NVIC_DisableIRQ(RAMECC_IRQn);
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NVIC_ClearPendingIRQ(RAMECC_IRQn);
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NVIC_EnableIRQ(RAMECC_IRQn);
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return ERR_NONE;
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}
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void _ramecc_register_callback(const enum _ramecc_callback_type type, ramecc_cb_t cb)
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{
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if (RAMECC_DUAL_ERROR_CB == type) {
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device.ramecc_cb.dual_bit_err = cb;
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hri_ramecc_write_INTEN_DUALE_bit(RAMECC, NULL != cb);
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} else if (RAMECC_SINGLE_ERROR_CB == type) {
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device.ramecc_cb.single_bit_err = cb;
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hri_ramecc_write_INTEN_SINGLEE_bit(RAMECC, NULL != cb);
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}
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}
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/**
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* \internal RAMECC interrupt handler
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*/
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void RAMECC_Handler(void)
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{
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struct _ramecc_device *dev = (struct _ramecc_device *)&device;
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volatile uint32_t int_mask = hri_ramecc_read_INTFLAG_reg(RAMECC);
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if (int_mask & RAMECC_INTFLAG_DUALE && dev->ramecc_cb.dual_bit_err) {
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dev->ramecc_cb.dual_bit_err((uint32_t)hri_ramecc_read_ERRADDR_reg(RAMECC));
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} else if (int_mask & RAMECC_INTFLAG_SINGLEE && dev->ramecc_cb.single_bit_err) {
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dev->ramecc_cb.single_bit_err((uint32_t)hri_ramecc_read_ERRADDR_reg(RAMECC));
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} else {
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return;
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}
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}
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