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@ -1038,7 +1038,11 @@ const char* GenericBinaryOpStub::GetName() { |
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} |
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// Call the specialized stub for a binary operation.
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// Perform or call the specialized stub for a binary operation. Requires the
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// three registers left, right and dst to be distinct and spilled. This
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// deferred operation has up to three entry points: The main one calls the
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// runtime system. The second is for when the result is a non-Smi. The
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// third is for when at least one of the inputs is non-Smi and we have SSE2.
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class DeferredInlineBinaryOperation: public DeferredCode { |
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public: |
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DeferredInlineBinaryOperation(Token::Value op, |
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@ -1051,11 +1055,23 @@ class DeferredInlineBinaryOperation: public DeferredCode { |
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: op_(op), dst_(dst), left_(left), right_(right), |
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left_info_(left_info), right_info_(right_info), mode_(mode) { |
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set_comment("[ DeferredInlineBinaryOperation"); |
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ASSERT(!left.is(right)); |
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} |
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virtual void Generate(); |
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// This stub makes explicit calls to SaveRegisters(), RestoreRegisters() and
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// Exit().
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virtual bool AutoSaveAndRestore() { return false; } |
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void JumpToAnswerOutOfRange(Condition cond); |
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void JumpToConstantRhs(Condition cond, Smi* smi_value); |
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Label* NonSmiInputLabel(); |
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private: |
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void GenerateAnswerOutOfRange(); |
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void GenerateNonSmiInput(); |
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Token::Value op_; |
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Register dst_; |
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Register left_; |
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@ -1063,12 +1079,39 @@ class DeferredInlineBinaryOperation: public DeferredCode { |
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TypeInfo left_info_; |
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TypeInfo right_info_; |
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OverwriteMode mode_; |
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Label answer_out_of_range_; |
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Label non_smi_input_; |
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Label constant_rhs_; |
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Smi* smi_value_; |
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}; |
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Label* DeferredInlineBinaryOperation::NonSmiInputLabel() { |
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if (Token::IsBitOp(op_) && CpuFeatures::IsSupported(SSE2)) { |
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return &non_smi_input_; |
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} else { |
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return entry_label(); |
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} |
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} |
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void DeferredInlineBinaryOperation::JumpToAnswerOutOfRange(Condition cond) { |
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__ j(cond, &answer_out_of_range_); |
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} |
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void DeferredInlineBinaryOperation::JumpToConstantRhs(Condition cond, |
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Smi* smi_value) { |
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smi_value_ = smi_value; |
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__ j(cond, &constant_rhs_); |
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} |
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void DeferredInlineBinaryOperation::Generate() { |
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Label done; |
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if (CpuFeatures::IsSupported(SSE2) && ((op_ == Token::ADD) || |
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// Registers are not saved implicitly for this stub, so we should not
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// tread on the registers that were not passed to us.
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if (CpuFeatures::IsSupported(SSE2) && |
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((op_ == Token::ADD) || |
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(op_ == Token::SUB) || |
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(op_ == Token::MUL) || |
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(op_ == Token::DIV))) { |
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@ -1131,7 +1174,6 @@ void DeferredInlineBinaryOperation::Generate() { |
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__ cvtsi2sd(xmm1, Operand(right_)); |
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__ SmiTag(right_); |
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if (mode_ == OVERWRITE_RIGHT || mode_ == NO_OVERWRITE) { |
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Label alloc_failure; |
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__ push(left_); |
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__ AllocateHeapNumber(dst_, left_, no_reg, &after_alloc_failure); |
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__ pop(left_); |
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@ -1146,19 +1188,200 @@ void DeferredInlineBinaryOperation::Generate() { |
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default: UNREACHABLE(); |
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} |
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__ movdbl(FieldOperand(dst_, HeapNumber::kValueOffset), xmm0); |
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__ jmp(&done); |
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Exit(); |
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__ bind(&after_alloc_failure); |
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__ pop(left_); |
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__ bind(&call_runtime); |
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} |
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// Register spilling is not done implicitly for this stub.
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// We can't postpone it any more now though.
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SaveRegisters(); |
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GenericBinaryOpStub stub(op_, |
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mode_, |
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NO_SMI_CODE_IN_STUB, |
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TypeInfo::Combine(left_info_, right_info_)); |
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stub.GenerateCall(masm_, left_, right_); |
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if (!dst_.is(eax)) __ mov(dst_, eax); |
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__ bind(&done); |
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RestoreRegisters(); |
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Exit(); |
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if (non_smi_input_.is_linked() || constant_rhs_.is_linked()) { |
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GenerateNonSmiInput(); |
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} |
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if (answer_out_of_range_.is_linked()) { |
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GenerateAnswerOutOfRange(); |
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} |
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} |
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void DeferredInlineBinaryOperation::GenerateNonSmiInput() { |
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// We know at least one of the inputs was not a Smi.
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// This is a third entry point into the deferred code.
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// We may not overwrite left_ because we want to be able
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// to call the handling code for non-smi answer and it
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// might want to overwrite the heap number in left_.
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ASSERT(!right_.is(dst_)); |
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ASSERT(!left_.is(dst_)); |
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ASSERT(!left_.is(right_)); |
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// This entry point is used for bit ops where the right hand side
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// is a constant Smi and the left hand side is a heap object. It
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// is also used for bit ops where both sides are unknown, but where
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// at least one of them is a heap object.
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bool rhs_is_constant = constant_rhs_.is_linked(); |
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// We can't generate code for both cases.
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ASSERT(!non_smi_input_.is_linked() || !constant_rhs_.is_linked()); |
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if (FLAG_debug_code) { |
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__ int3(); // We don't fall through into this code.
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} |
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__ bind(&non_smi_input_); |
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if (rhs_is_constant) { |
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__ bind(&constant_rhs_); |
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// In this case the input is a heap object and it is in the dst_ register.
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// The left_ and right_ registers have not been initialized yet.
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__ mov(right_, Immediate(smi_value_)); |
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__ mov(left_, Operand(dst_)); |
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if (!CpuFeatures::IsSupported(SSE2)) { |
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__ jmp(entry_label()); |
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return; |
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} else { |
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CpuFeatures::Scope use_sse2(SSE2); |
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__ JumpIfNotNumber(dst_, left_info_, entry_label()); |
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__ ConvertToInt32(dst_, left_, dst_, left_info_, entry_label()); |
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__ SmiUntag(right_); |
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} |
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} else { |
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// We know we have SSE2 here because otherwise the label is not linked (see
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// NonSmiInputLabel).
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CpuFeatures::Scope use_sse2(SSE2); |
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// Handle the non-constant right hand side situation:
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if (left_info_.IsSmi()) { |
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// Right is a heap object.
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__ JumpIfNotNumber(right_, right_info_, entry_label()); |
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__ ConvertToInt32(right_, right_, dst_, left_info_, entry_label()); |
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__ mov(dst_, Operand(left_)); |
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__ SmiUntag(dst_); |
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} else if (right_info_.IsSmi()) { |
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// Left is a heap object.
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__ JumpIfNotNumber(left_, left_info_, entry_label()); |
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__ ConvertToInt32(dst_, left_, dst_, left_info_, entry_label()); |
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__ SmiUntag(right_); |
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} else { |
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// Here we don't know if it's one or both that is a heap object.
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Label only_right_is_heap_object, got_both; |
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__ mov(dst_, Operand(left_)); |
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__ SmiUntag(dst_, &only_right_is_heap_object); |
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// Left was a heap object.
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__ JumpIfNotNumber(left_, left_info_, entry_label()); |
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__ ConvertToInt32(dst_, left_, dst_, left_info_, entry_label()); |
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__ SmiUntag(right_, &got_both); |
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// Both were heap objects.
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__ rcl(right_, 1); // Put tag back.
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__ JumpIfNotNumber(right_, right_info_, entry_label()); |
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__ ConvertToInt32(right_, right_, no_reg, left_info_, entry_label()); |
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__ jmp(&got_both); |
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__ bind(&only_right_is_heap_object); |
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__ JumpIfNotNumber(right_, right_info_, entry_label()); |
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__ ConvertToInt32(right_, right_, no_reg, left_info_, entry_label()); |
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__ bind(&got_both); |
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} |
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} |
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ASSERT(op_ == Token::BIT_AND || |
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op_ == Token::BIT_OR || |
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op_ == Token::BIT_XOR || |
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right_.is(ecx)); |
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switch (op_) { |
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case Token::BIT_AND: __ and_(dst_, Operand(right_)); break; |
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case Token::BIT_OR: __ or_(dst_, Operand(right_)); break; |
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case Token::BIT_XOR: __ xor_(dst_, Operand(right_)); break; |
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case Token::SHR: __ shr_cl(dst_); break; |
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case Token::SAR: __ sar_cl(dst_); break; |
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case Token::SHL: __ shl_cl(dst_); break; |
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default: UNREACHABLE(); |
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} |
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if (op_ == Token::SHR) { |
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// Check that the *unsigned* result fits in a smi. Neither of
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// the two high-order bits can be set:
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// * 0x80000000: high bit would be lost when smi tagging.
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// * 0x40000000: this number would convert to negative when smi
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// tagging.
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__ test(dst_, Immediate(0xc0000000)); |
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__ j(not_zero, &answer_out_of_range_); |
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} else { |
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// Check that the *signed* result fits in a smi.
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__ cmp(dst_, 0xc0000000); |
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__ j(negative, &answer_out_of_range_); |
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} |
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__ SmiTag(dst_); |
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Exit(); |
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} |
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void DeferredInlineBinaryOperation::GenerateAnswerOutOfRange() { |
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Label after_alloc_failure2; |
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Label allocation_ok; |
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__ bind(&after_alloc_failure2); |
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// We have to allocate a number, causing a GC, while keeping hold of
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// the answer in dst_. The answer is not a Smi. We can't just call the
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// runtime shift function here because we already threw away the inputs.
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__ xor_(left_, Operand(left_)); |
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__ shl(dst_, 1); // Put top bit in carry flag and Smi tag the low bits.
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__ rcr(left_, 1); // Rotate with carry.
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__ push(dst_); // Smi tagged low 31 bits.
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__ push(left_); // 0 or 0x80000000, which is Smi tagged in both cases.
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__ CallRuntime(Runtime::kNumberAlloc, 0); |
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if (!left_.is(eax)) { |
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__ mov(left_, eax); |
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} |
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__ pop(right_); // High bit.
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__ pop(dst_); // Low 31 bits.
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__ shr(dst_, 1); // Put 0 in top bit.
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__ or_(dst_, Operand(right_)); |
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__ jmp(&allocation_ok); |
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// This is the second entry point to the deferred code. It is used only by
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// the bit operations.
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// The dst_ register has the answer. It is not Smi tagged. If mode_ is
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// OVERWRITE_LEFT then left_ must contain either an overwritable heap number
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// or a Smi.
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// Put a heap number pointer in left_.
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__ bind(&answer_out_of_range_); |
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SaveRegisters(); |
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if (mode_ == OVERWRITE_LEFT) { |
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__ test(left_, Immediate(kSmiTagMask)); |
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__ j(not_zero, &allocation_ok); |
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} |
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// This trashes right_.
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__ AllocateHeapNumber(left_, right_, no_reg, &after_alloc_failure2); |
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__ bind(&allocation_ok); |
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if (CpuFeatures::IsSupported(SSE2) && op_ != Token::SHR) { |
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CpuFeatures::Scope use_sse2(SSE2); |
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ASSERT(Token::IsBitOp(op_)); |
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// Signed conversion.
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__ cvtsi2sd(xmm0, Operand(dst_)); |
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__ movdbl(FieldOperand(left_, HeapNumber::kValueOffset), xmm0); |
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} else { |
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if (op_ == Token::SHR) { |
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__ push(Immediate(0)); // High word of unsigned value.
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__ push(dst_); |
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__ fild_d(Operand(esp, 0)); |
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__ Drop(2); |
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} else { |
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ASSERT(Token::IsBitOp(op_)); |
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__ push(dst_); |
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__ fild_s(Operand(esp, 0)); // Signed conversion.
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__ pop(dst_); |
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} |
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__ fstp_d(FieldOperand(left_, HeapNumber::kValueOffset)); |
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} |
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__ mov(dst_, left_); |
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RestoreRegisters(); |
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Exit(); |
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} |
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@ -1499,10 +1722,25 @@ void CodeGenerator::JumpIfNotBothSmiUsingTypeInfo(Register left, |
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TypeInfo left_info, |
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TypeInfo right_info, |
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DeferredCode* deferred) { |
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JumpIfNotBothSmiUsingTypeInfo(left, |
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right, |
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scratch, |
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left_info, |
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right_info, |
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deferred->entry_label()); |
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} |
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void CodeGenerator::JumpIfNotBothSmiUsingTypeInfo(Register left, |
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Register right, |
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Register scratch, |
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TypeInfo left_info, |
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TypeInfo right_info, |
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Label* on_not_smi) { |
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if (left.is(right)) { |
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if (!left_info.IsSmi()) { |
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__ test(left, Immediate(kSmiTagMask)); |
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deferred->Branch(not_zero); |
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__ j(not_zero, on_not_smi); |
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} else { |
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if (FLAG_debug_code) __ AbortIfNotSmi(left); |
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} |
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@ -1511,17 +1749,17 @@ void CodeGenerator::JumpIfNotBothSmiUsingTypeInfo(Register left, |
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__ mov(scratch, left); |
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__ or_(scratch, Operand(right)); |
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__ test(scratch, Immediate(kSmiTagMask)); |
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deferred->Branch(not_zero); |
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__ j(not_zero, on_not_smi); |
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} else { |
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__ test(left, Immediate(kSmiTagMask)); |
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deferred->Branch(not_zero); |
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__ j(not_zero, on_not_smi); |
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if (FLAG_debug_code) __ AbortIfNotSmi(right); |
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} |
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} else { |
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if (FLAG_debug_code) __ AbortIfNotSmi(left); |
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if (!right_info.IsSmi()) { |
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__ test(right, Immediate(kSmiTagMask)); |
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deferred->Branch(not_zero); |
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__ j(not_zero, on_not_smi); |
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} else { |
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if (FLAG_debug_code) __ AbortIfNotSmi(right); |
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} |
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@ -1606,13 +1844,16 @@ Result CodeGenerator::LikelySmiBinaryOperation(BinaryOperation* expr, |
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right->ToRegister(); |
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frame_->Spill(eax); |
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frame_->Spill(edx); |
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// DeferredInlineBinaryOperation requires all the registers that it is
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// told about to be spilled and distinct.
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Result distinct_right = frame_->MakeDistinctAndSpilled(left, right); |
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// Check that left and right are smi tagged.
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DeferredInlineBinaryOperation* deferred = |
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new DeferredInlineBinaryOperation(op, |
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(op == Token::DIV) ? eax : edx, |
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left->reg(), |
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right->reg(), |
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distinct_right.reg(), |
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left_type_info, |
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right_type_info, |
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overwrite_mode); |
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@ -1695,15 +1936,23 @@ Result CodeGenerator::LikelySmiBinaryOperation(BinaryOperation* expr, |
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left->ToRegister(); |
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ASSERT(left->is_register() && !left->reg().is(ecx)); |
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ASSERT(right->is_register() && right->reg().is(ecx)); |
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if (left_type_info.IsSmi()) { |
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if (FLAG_debug_code) __ AbortIfNotSmi(left->reg()); |
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} |
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if (right_type_info.IsSmi()) { |
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if (FLAG_debug_code) __ AbortIfNotSmi(right->reg()); |
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} |
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// We will modify right, it must be spilled.
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frame_->Spill(ecx); |
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// DeferredInlineBinaryOperation requires all the registers that it is told
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// about to be spilled and distinct. We know that right is ecx and left is
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// not ecx.
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frame_->Spill(left->reg()); |
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// Use a fresh answer register to avoid spilling the left operand.
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answer = allocator_->Allocate(); |
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ASSERT(answer.is_valid()); |
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// Check that both operands are smis using the answer register as a
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// temporary.
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DeferredInlineBinaryOperation* deferred = |
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new DeferredInlineBinaryOperation(op, |
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answer.reg(), |
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@ -1712,55 +1961,28 @@ Result CodeGenerator::LikelySmiBinaryOperation(BinaryOperation* expr, |
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left_type_info, |
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right_type_info, |
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overwrite_mode); |
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Label do_op, left_nonsmi; |
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// If right is a smi we make a fast case if left is either a smi
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// or a heapnumber.
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if (CpuFeatures::IsSupported(SSE2) && right_type_info.IsSmi()) { |
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CpuFeatures::Scope use_sse2(SSE2); |
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__ mov(answer.reg(), left->reg()); |
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// Fast case - both are actually smis.
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if (!left_type_info.IsSmi()) { |
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__ test(answer.reg(), Immediate(kSmiTagMask)); |
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__ j(not_zero, &left_nonsmi); |
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} else { |
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if (FLAG_debug_code) __ AbortIfNotSmi(left->reg()); |
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} |
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if (FLAG_debug_code) __ AbortIfNotSmi(right->reg()); |
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__ SmiUntag(answer.reg()); |
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__ jmp(&do_op); |
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__ bind(&left_nonsmi); |
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// Branch if not a heapnumber.
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__ cmp(FieldOperand(answer.reg(), HeapObject::kMapOffset), |
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Factory::heap_number_map()); |
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deferred->Branch(not_equal); |
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// Load integer value into answer register using truncation.
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__ cvttsd2si(answer.reg(), |
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FieldOperand(answer.reg(), HeapNumber::kValueOffset)); |
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// Branch if we do not fit in a smi.
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__ cmp(answer.reg(), 0xc0000000); |
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deferred->Branch(negative); |
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} else { |
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JumpIfNotBothSmiUsingTypeInfo(left->reg(), right->reg(), answer.reg(), |
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left_type_info, right_type_info, deferred); |
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left_type_info, right_type_info, |
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deferred->NonSmiInputLabel()); |
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// Untag both operands.
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__ mov(answer.reg(), left->reg()); |
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__ SmiUntag(answer.reg()); |
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} |
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__ SmiUntag(right->reg()); // Right is ecx.
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__ bind(&do_op); |
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__ SmiUntag(ecx); |
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// Perform the operation.
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ASSERT(right->reg().is(ecx)); |
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switch (op) { |
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case Token::SAR: |
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case Token::SAR: { |
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__ sar_cl(answer.reg()); |
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// No checks of result necessary
|
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if (!left_type_info.IsSmi()) { |
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// Check that the *signed* result fits in a smi.
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__ cmp(answer.reg(), 0xc0000000); |
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deferred->JumpToAnswerOutOfRange(negative); |
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} |
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break; |
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} |
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case Token::SHR: { |
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Label result_ok; |
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__ shr_cl(answer.reg()); |
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// Check that the *unsigned* result fits in a smi. Neither of
|
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// the two high-order bits can be set:
|
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@ -1773,21 +1995,14 @@ Result CodeGenerator::LikelySmiBinaryOperation(BinaryOperation* expr, |
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// case. The low bit of the left argument may be lost, but only
|
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// in a case where it is dropped anyway.
|
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__ test(answer.reg(), Immediate(0xc0000000)); |
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__ j(zero, &result_ok); |
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__ SmiTag(ecx); |
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deferred->Jump(); |
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__ bind(&result_ok); |
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deferred->JumpToAnswerOutOfRange(not_zero); |
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break; |
|
|
|
} |
|
|
|
case Token::SHL: { |
|
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Label result_ok; |
|
|
|
__ shl_cl(answer.reg()); |
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|
// Check that the *signed* result fits in a smi.
|
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|
|
__ cmp(answer.reg(), 0xc0000000); |
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|
__ j(positive, &result_ok); |
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__ SmiTag(ecx); |
|
|
|
deferred->Jump(); |
|
|
|
__ bind(&result_ok); |
|
|
|
deferred->JumpToAnswerOutOfRange(negative); |
|
|
|
break; |
|
|
|
} |
|
|
|
default: |
|
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|
@ -1805,6 +2020,9 @@ Result CodeGenerator::LikelySmiBinaryOperation(BinaryOperation* expr, |
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|
// Handle the other binary operations.
|
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|
|
left->ToRegister(); |
|
|
|
right->ToRegister(); |
|
|
|
// DeferredInlineBinaryOperation requires all the registers that it is told
|
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|
|
// about to be spilled.
|
|
|
|
Result distinct_right = frame_->MakeDistinctAndSpilled(left, right); |
|
|
|
// A newly allocated register answer is used to hold the answer. The
|
|
|
|
// registers containing left and right are not modified so they don't
|
|
|
|
// need to be spilled in the fast case.
|
|
|
|
@ -1816,12 +2034,16 @@ Result CodeGenerator::LikelySmiBinaryOperation(BinaryOperation* expr, |
|
|
|
new DeferredInlineBinaryOperation(op, |
|
|
|
answer.reg(), |
|
|
|
left->reg(), |
|
|
|
right->reg(), |
|
|
|
distinct_right.reg(), |
|
|
|
left_type_info, |
|
|
|
right_type_info, |
|
|
|
overwrite_mode); |
|
|
|
Label non_smi_bit_op; |
|
|
|
if (op != Token::BIT_OR) { |
|
|
|
JumpIfNotBothSmiUsingTypeInfo(left->reg(), right->reg(), answer.reg(), |
|
|
|
left_type_info, right_type_info, deferred); |
|
|
|
left_type_info, right_type_info, |
|
|
|
deferred->NonSmiInputLabel()); |
|
|
|
} |
|
|
|
|
|
|
|
__ mov(answer.reg(), left->reg()); |
|
|
|
switch (op) { |
|
|
|
@ -1864,6 +2086,8 @@ Result CodeGenerator::LikelySmiBinaryOperation(BinaryOperation* expr, |
|
|
|
|
|
|
|
case Token::BIT_OR: |
|
|
|
__ or_(answer.reg(), Operand(right->reg())); |
|
|
|
__ test(answer.reg(), Immediate(kSmiTagMask)); |
|
|
|
__ j(not_zero, deferred->NonSmiInputLabel()); |
|
|
|
break; |
|
|
|
|
|
|
|
case Token::BIT_AND: |
|
|
|
@ -1878,6 +2102,7 @@ Result CodeGenerator::LikelySmiBinaryOperation(BinaryOperation* expr, |
|
|
|
UNREACHABLE(); |
|
|
|
break; |
|
|
|
} |
|
|
|
|
|
|
|
deferred->BindExit(); |
|
|
|
left->Unuse(); |
|
|
|
right->Unuse(); |
|
|
|
@ -2363,27 +2588,25 @@ Result CodeGenerator::ConstantSmiBinaryOperation(BinaryOperation* expr, |
|
|
|
case Token::BIT_XOR: |
|
|
|
case Token::BIT_AND: { |
|
|
|
operand->ToRegister(); |
|
|
|
// DeferredInlineBinaryOperation requires all the registers that it is
|
|
|
|
// told about to be spilled.
|
|
|
|
frame_->Spill(operand->reg()); |
|
|
|
DeferredCode* deferred = NULL; |
|
|
|
if (reversed) { |
|
|
|
deferred = |
|
|
|
new DeferredInlineSmiOperationReversed(op, |
|
|
|
operand->reg(), |
|
|
|
smi_value, |
|
|
|
operand->reg(), |
|
|
|
operand->type_info(), |
|
|
|
overwrite_mode); |
|
|
|
} else { |
|
|
|
deferred = new DeferredInlineSmiOperation(op, |
|
|
|
operand->reg(), |
|
|
|
DeferredInlineBinaryOperation* deferred = NULL; |
|
|
|
if (!operand->type_info().IsSmi()) { |
|
|
|
Result left = allocator()->Allocate(); |
|
|
|
ASSERT(left.is_valid()); |
|
|
|
Result right = allocator()->Allocate(); |
|
|
|
ASSERT(right.is_valid()); |
|
|
|
deferred = new DeferredInlineBinaryOperation( |
|
|
|
op, |
|
|
|
operand->reg(), |
|
|
|
left.reg(), |
|
|
|
right.reg(), |
|
|
|
operand->type_info(), |
|
|
|
smi_value, |
|
|
|
overwrite_mode); |
|
|
|
} |
|
|
|
if (!operand->type_info().IsSmi()) { |
|
|
|
TypeInfo::Smi(), |
|
|
|
overwrite_mode == NO_OVERWRITE ? NO_OVERWRITE : OVERWRITE_LEFT); |
|
|
|
__ test(operand->reg(), Immediate(kSmiTagMask)); |
|
|
|
deferred->Branch(not_zero); |
|
|
|
deferred->JumpToConstantRhs(not_zero, smi_value); |
|
|
|
} else if (FLAG_debug_code) { |
|
|
|
__ AbortIfNotSmi(operand->reg()); |
|
|
|
} |
|
|
|
@ -2399,7 +2622,7 @@ Result CodeGenerator::ConstantSmiBinaryOperation(BinaryOperation* expr, |
|
|
|
__ or_(Operand(operand->reg()), Immediate(value)); |
|
|
|
} |
|
|
|
} |
|
|
|
deferred->BindExit(); |
|
|
|
if (deferred != NULL) deferred->BindExit(); |
|
|
|
answer = *operand; |
|
|
|
break; |
|
|
|
} |
|
|
|
@ -3212,10 +3435,8 @@ void CodeGenerator::CallApplyLazy(Expression* applicand, |
|
|
|
__ j(zero, &build_args); |
|
|
|
__ CmpObjectType(eax, JS_FUNCTION_TYPE, ecx); |
|
|
|
__ j(not_equal, &build_args); |
|
|
|
__ mov(ecx, FieldOperand(eax, JSFunction::kSharedFunctionInfoOffset)); |
|
|
|
Handle<Code> apply_code(Builtins::builtin(Builtins::FunctionApply)); |
|
|
|
__ cmp(FieldOperand(ecx, SharedFunctionInfo::kCodeOffset), |
|
|
|
Immediate(apply_code)); |
|
|
|
__ cmp(FieldOperand(eax, JSFunction::kCodeOffset), Immediate(apply_code)); |
|
|
|
__ j(not_equal, &build_args); |
|
|
|
|
|
|
|
// Check that applicand is a function.
|
|
|
|
@ -9467,6 +9688,11 @@ void FastNewClosureStub::Generate(MacroAssembler* masm) { |
|
|
|
__ mov(FieldOperand(eax, JSFunction::kContextOffset), esi); |
|
|
|
__ mov(FieldOperand(eax, JSFunction::kLiteralsOffset), ebx); |
|
|
|
|
|
|
|
// Initialize the code pointer in the function to be the one
|
|
|
|
// found in the shared function info object.
|
|
|
|
__ mov(edx, FieldOperand(edx, SharedFunctionInfo::kCodeOffset)); |
|
|
|
__ mov(FieldOperand(eax, JSFunction::kCodeOffset), edx); |
|
|
|
|
|
|
|
// Return and remove the on-stack parameter.
|
|
|
|
__ ret(1 * kPointerSize); |
|
|
|
|
|
|
|
|
Ryan Dahl
15 years ago